| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIMachineFunctionInfo.cpp | 332 auto &Spill = VGPRToAGPRSpills[FI]; in allocateVGPRSpillToAGPR() local
335 if (!Spill.Lanes.empty()) in allocateVGPRSpillToAGPR()
336 return Spill.FullyAllocated; in allocateVGPRSpillToAGPR()
340 Spill.Lanes.resize(NumLanes, AMDGPU::NoRegister); in allocateVGPRSpillToAGPR()
348 Spill.FullyAllocated = true; in allocateVGPRSpillToAGPR()
376 Spill.FullyAllocated = false; in allocateVGPRSpillToAGPR()
382 Spill.Lanes[I] = *NextSpillReg++; in allocateVGPRSpillToAGPR()
385 return Spill.FullyAllocated; in allocateVGPRSpillToAGPR()
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| D | SIFrameLowering.cpp | 756 ArrayRef<SIMachineFunctionInfo::SpilledReg> Spill in emitPrologue() local
758 assert(Spill.size() == 1); in emitPrologue()
763 Spill[0].VGPR) in emitPrologue()
765 .addImm(Spill[0].Lane) in emitPrologue()
766 .addReg(Spill[0].VGPR, RegState::Undef); in emitPrologue()
860 ArrayRef<SIMachineFunctionInfo::SpilledReg> Spill in emitEpilogue() local
862 assert(Spill.size() == 1); in emitEpilogue()
865 .addReg(Spill[0].VGPR) in emitEpilogue()
866 .addImm(Spill[0].Lane); in emitEpilogue()
1027 auto Spill = MFI->getSGPRToVGPRSpills(NewFI).front(); in determineCalleeSaves()
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| D | SIMachineFunctionInfo.h | 751 void setHasSpilledSGPRs(bool Spill = true) {
752 HasSpilledSGPRs = Spill;
759 void setHasSpilledVGPRs(bool Spill = true) {
760 HasSpilledVGPRs = Spill;
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| D | SIRegisterInfo.cpp | 791 SIMachineFunctionInfo::SpilledReg Spill = VGPRSpills[i]; in spillSGPR() local
798 VGPRDefined = !SGPRSpillVGPRDefinedSet.insert(Spill.VGPR).second; in spillSGPR()
804 Spill.VGPR) in spillSGPR()
806 .addImm(Spill.Lane) in spillSGPR()
807 .addReg(Spill.VGPR, VGPRDefined ? 0 : RegState::Undef); in spillSGPR()
892 SIMachineFunctionInfo::SpilledReg Spill = VGPRSpills[i]; in restoreSGPR() local
896 .addReg(Spill.VGPR) in restoreSGPR()
897 .addImm(Spill.Lane); in restoreSGPR()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | RegAllocBasic.cpp | 227 LiveInterval &Spill = *Intfs[i]; in spillInterferences() local
230 if (!VRM->hasPhys(Spill.reg)) in spillInterferences()
235 Matrix->unassign(Spill); in spillInterferences()
238 LiveRangeEdit LRE(&Spill, SplitVRegs, *MF, *LIS, VRM, this, &DeadRemats); in spillInterferences()
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| D | InlineSpiller.cpp | 151 void addToMergeableSpills(MachineInstr &Spill, int StackSlot,
153 bool rmFromMergeableSpills(MachineInstr &Spill, int StackSlot);
1138 void HoistSpillHelper::addToMergeableSpills(MachineInstr &Spill, int StackSlot, in addToMergeableSpills() argument
1149 SlotIndex Idx = LIS.getInstructionIndex(Spill); in addToMergeableSpills()
1152 MergeableSpills[MIdx].insert(&Spill); in addToMergeableSpills()
1157 bool HoistSpillHelper::rmFromMergeableSpills(MachineInstr &Spill, in rmFromMergeableSpills() argument
1162 SlotIndex Idx = LIS.getInstructionIndex(Spill); in rmFromMergeableSpills()
1165 return MergeableSpills[MIdx].erase(&Spill); in rmFromMergeableSpills()
1251 for (const auto Spill : Spills) { in getVisitOrders() local
1252 MachineBasicBlock *Block = Spill->getParent(); in getVisitOrders()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Coroutines/ |
| D | CoroFrame.cpp | 289 class Spill { class
295 Spill(Value *Def, llvm::User *U) : Def(Def), User(cast<Instruction>(U)) {} in Spill() function in __anon0f59f9700511::Spill
319 using SpillInfo = SmallVector<Spill, 8>;
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| D | IceTargetLoweringX8632.cpp | 2908 Variable *Spill = Func->makeVariable(IceType_f64); in lowerCast() local
2909 Spill->setLinkedTo(Src0Var); in lowerCast()
2910 Spill->setMustNotHaveReg(); in lowerCast()
2911 _movq(Spill, Src0RM); in lowerCast()
2912 SpillLo = VariableSplit::create(Func, Spill, VariableSplit::Low); in lowerCast()
2913 SpillHi = VariableSplit::create(Func, Spill, VariableSplit::High); in lowerCast()
2945 Variable *Spill = Func->makeVariable(IceType_f64); in lowerCast() local
2946 Spill->setLinkedTo(Dest); in lowerCast()
2947 Spill->setMustNotHaveReg(); in lowerCast()
2950 auto *SpillLo = VariableSplit::create(Func, Spill, VariableSplit::Low); in lowerCast()
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| /third_party/gstreamer/gstplugins_base/po/ |
| D | nb.po | 784 #~ msgstr "Spill av"
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/ |
| D | Target.td | 62 int SpillSize = SS; // Spill slot size in bits.
63 int SpillAlignment = SA; // Spill slot alignment in bits.
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64SVEInstrInfo.td | 707 // Fill/Spill
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| /third_party/mesa3d/docs/relnotes/ |
| D | 21.0.0.rst | 3162 - aco: Spill more optimally before loops.
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