| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| D | IceVariableSplitting.cpp | 84 if (auto *SrcVar = llvm::dyn_cast<Variable>(Instr.getSrc(i))) { in reset() local
85 const SizeT VarNum = getVarNum(SrcVar); in reset()
282 auto *SrcVar = llvm::cast<Variable>(Instr->getSrc(0)); in handleSimpleVarAssign() local
283 const bool SrcIsInf = isInf(SrcVar); in handleSimpleVarAssign()
284 const bool SrcIsAllocable = isAllocable(SrcVar); in handleSimpleVarAssign()
291 if (DestIsInf && SrcIsAllocable && Dest->getType() == SrcVar->getType()) { in handleSimpleVarAssign()
309 Variable *OldMapped = VarMap.get(SrcVar); in handleSimpleVarAssign()
314 if (!VarMap.isInstLastUseOfVar(SrcVar, Instr)) { in handleSimpleVarAssign()
315 Variable *NewMapped = VarMap.makeLinked(SrcVar); in handleSimpleVarAssign()
341 Inst *Mov = Target->createLoweredMove(NewMapped, SrcVar); in handleSimpleVarAssign()
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| D | IceInstX8664.cpp | 671 if (const auto *SrcVar = llvm::dyn_cast<Variable>(Src)) { in emitIASRegOpTyGPR() local
672 if (SrcVar->hasReg()) { in emitIASRegOpTyGPR()
674 ? RegX8664::getEncodedGPR(SrcVar->getRegNum()) in emitIASRegOpTyGPR()
675 : RegX8664::getEncodedGPR(SrcVar->getRegNum()); in emitIASRegOpTyGPR()
678 AsmAddress SrcStackAddr = AsmAddress(SrcVar, Target); in emitIASRegOpTyGPR()
705 if (const auto *SrcVar = llvm::dyn_cast<Variable>(Src)) { in emitIASAddrOpTyGPR() local
706 assert(SrcVar->hasReg()); in emitIASAddrOpTyGPR()
707 GPRRegister SrcReg = RegX8664::getEncodedGPR(SrcVar->getRegNum()); in emitIASAddrOpTyGPR()
751 if (const auto *SrcVar = llvm::dyn_cast<Variable>(Src)) { in emitIASGPRShift() local
752 assert(SrcVar->hasReg()); in emitIASGPRShift()
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| D | IceInstX8632.cpp | 684 if (const auto *SrcVar = llvm::dyn_cast<Variable>(Src)) { in emitIASRegOpTyGPR() local
685 if (SrcVar->hasReg()) { in emitIASRegOpTyGPR()
687 ? RegX8632::getEncodedGPR(SrcVar->getRegNum()) in emitIASRegOpTyGPR()
688 : RegX8632::getEncodedGPR(SrcVar->getRegNum()); in emitIASRegOpTyGPR()
691 AsmAddress SrcStackAddr = AsmAddress(SrcVar, Target); in emitIASRegOpTyGPR()
717 if (const auto *SrcVar = llvm::dyn_cast<Variable>(Src)) { in emitIASAddrOpTyGPR() local
718 assert(SrcVar->hasReg()); in emitIASAddrOpTyGPR()
719 GPRRegister SrcReg = RegX8632::getEncodedGPR(SrcVar->getRegNum()); in emitIASAddrOpTyGPR()
762 if (const auto *SrcVar = llvm::dyn_cast<Variable>(Src)) { in emitIASGPRShift() local
763 assert(SrcVar->hasReg()); in emitIASGPRShift()
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| D | IceInst.cpp | 1026 const auto *SrcVar = llvm::dyn_cast<const Variable>(Source); in checkForRedundantAssign() local
1027 if (SrcVar == nullptr) in checkForRedundantAssign()
1029 if (Dest->hasReg() && Dest->getRegNum() == SrcVar->getRegNum()) { in checkForRedundantAssign()
1034 if (!Dest->hasReg() && !SrcVar->hasReg()) { in checkForRedundantAssign()
1035 if (!Dest->hasStackOffset() || !SrcVar->hasStackOffset()) { in checkForRedundantAssign()
1040 if (Dest->getStackOffset() != SrcVar->getStackOffset()) { in checkForRedundantAssign()
1049 if (SrcVar->hasReg() && Dest->hasStackOffset() && in checkForRedundantAssign()
1051 Dest->getLinkedToRoot() == SrcVar->getLinkedToRoot()) { in checkForRedundantAssign()
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| D | IceRegAlloc.cpp | 526 FOREACH_VAR_IN_INST(SrcVar, *DefInst) { in findRegisterPreference()
529 if (!SrcVar->hasRegTmp()) in findRegisterPreference()
534 const auto &Aliases = *RegAliases[SrcVar->getRegNumTmp()]; in findRegisterPreference()
542 Iter.AllowOverlap = !overlapsDefs(Func, Iter.Cur, SrcVar); in findRegisterPreference()
545 Iter.Prefer = SrcVar; in findRegisterPreference()
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| D | IceTargetLowering.h | 335 virtual Inst *createLoweredMove(Variable *Dest, Variable *SrcVar) { in createLoweredMove() argument
338 (void)SrcVar; in createLoweredMove()
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| D | IceTargetLoweringX8632.h | 137 Inst *createLoweredMove(Variable *Dest, Variable *SrcVar) override { in createLoweredMove() argument
139 return Insts::Movp::create(Func, Dest, SrcVar); in createLoweredMove()
141 return Insts::Mov::create(Func, Dest, SrcVar); in createLoweredMove()
143 (void)SrcVar; in createLoweredMove()
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| D | IceTargetLoweringX8664.h | 138 Inst *createLoweredMove(Variable *Dest, Variable *SrcVar) override { in createLoweredMove() argument
140 return Insts::Movp::create(Func, Dest, SrcVar); in createLoweredMove()
142 return Insts::Mov::create(Func, Dest, SrcVar); in createLoweredMove()
144 (void)SrcVar; in createLoweredMove()
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| D | IceTargetLoweringMIPS32.cpp | 5190 if (auto *SrcVar = llvm::dyn_cast<Variable>(SrcOp)) { in matchAssign() local
5191 if (!VMetadata->isMultiDef(SrcVar) || in matchAssign()
5195 *Var = SrcVar; in matchAssign()
5594 Variable *SrcVar = legalizeToReg(Src); in lowerSwitch() local
5595 assert(SrcVar->mustHaveReg()); in lowerSwitch()
5601 _br(NoTargetFalse, TargetTrue, SrcVar, Value, CondMIPS32::Cond::EQ); in lowerSwitch()
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| D | IceInstX8632.h | 1127 if (const auto *SrcVar = llvm::dyn_cast<const Variable>(this->getSrc(0))) { in isRedundantAssign() local
1128 if (SrcVar->hasReg() && this->Dest->hasReg()) { in isRedundantAssign()
1136 const auto SrcReg = SrcVar->getRegNum(); in isRedundantAssign()
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| D | IceInstX8664.h | 1066 if (const auto *SrcVar = llvm::dyn_cast<const Variable>(this->getSrc(0))) { in isRedundantAssign() local
1067 if (SrcVar->hasReg() && this->Dest->hasReg()) { in isRedundantAssign()
1075 const auto SrcReg = SrcVar->getRegNum(); in isRedundantAssign()
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| D | IceTargetLoweringARM32.cpp | 5328 if (auto *SrcVar = llvm::dyn_cast<Variable>(SrcOp)) { in matchAssign() local
5329 if (!VMetadata->isMultiDef(SrcVar) || in matchAssign()
5333 *Var = SrcVar; in matchAssign()
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| D | IceTargetLoweringX8664.cpp | 4489 if (auto *SrcVar = llvm::dyn_cast<Variable>(SrcOp)) { in matchAssign() local
4490 if (!VMetadata->isMultiDef(SrcVar) && in matchAssign()
4493 *Var = SrcVar; in matchAssign()
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| D | IceTargetLoweringX8632.cpp | 5068 if (auto *SrcVar = llvm::dyn_cast<Variable>(SrcOp)) { in matchAssign() local
5069 if (!VMetadata->isMultiDef(SrcVar) && in matchAssign()
5072 *Var = SrcVar; in matchAssign()
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