| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/FuzzMutate/ |
| D | Operations.cpp | 93 auto buildOp = [Op](ArrayRef<Value *> Srcs, Instruction *Inst) { in binOpDescriptor() argument
94 return BinaryOperator::Create(Op, Srcs[0], Srcs[1], "B", Inst); in binOpDescriptor()
126 auto buildOp = [CmpOp, Pred](ArrayRef<Value *> Srcs, Instruction *Inst) { in cmpOpDescriptor() argument
127 return CmpInst::Create(CmpOp, Pred, Srcs[0], Srcs[1], "C", Inst); in cmpOpDescriptor()
141 auto buildSplitBlock = [](ArrayRef<Value *> Srcs, Instruction *Inst) { in splitBlockDescriptor() argument
152 BranchInst::Create(Block, Next, Srcs[0], Block->getTerminator()); in splitBlockDescriptor()
171 auto buildGEP = [](ArrayRef<Value *> Srcs, Instruction *Inst) { in gepDescriptor() argument
172 Type *Ty = cast<PointerType>(Srcs[0]->getType())->getElementType(); in gepDescriptor()
173 auto Indices = makeArrayRef(Srcs).drop_front(1); in gepDescriptor()
174 return GetElementPtrInst::Create(Ty, Srcs[0], Indices, "G", Inst); in gepDescriptor()
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| D | RandomIRBuilder.cpp | 28 ArrayRef<Value *> Srcs, in findOrCreateSource() argument
30 auto MatchesPred = [&Srcs, &Pred](Instruction *Inst) { in findOrCreateSource()
31 return Pred.matches(Srcs, Inst); in findOrCreateSource()
38 return newSource(BB, Insts, Srcs, Pred); in findOrCreateSource()
42 ArrayRef<Value *> Srcs, SourcePred Pred) { in newSource() argument
45 RS.sample(Pred.generate(Srcs, KnownTypes)); in newSource()
48 Value *Ptr = findPointer(BB, Insts, Srcs, Pred); in newSource()
60 if (Pred.matches(Srcs, NewLoad)) in newSource()
135 ArrayRef<Value *> Srcs, SourcePred Pred) { in findPointer() argument
136 auto IsMatchingPtr = [&Srcs, &Pred](Instruction *Inst) { in findPointer()
[all …]
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| D | IRMutator.cpp | 120 SmallVector<Value *, 2> Srcs; in mutate() local
121 Srcs.push_back(IB.findOrCreateSource(BB, InstsBefore)); in mutate()
125 auto OpDesc = chooseOperation(Srcs[0], IB); in mutate()
131 Srcs.push_back(IB.findOrCreateSource(BB, InstsBefore, Srcs, Pred)); in mutate()
133 if (Value *Op = OpDesc->BuilderFunc(Srcs, Insts[IP])) { in mutate()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/FuzzMutate/ |
| D | RandomIRBuilder.h | 44 ArrayRef<Value *> Srcs, fuzzerop::SourcePred Pred);
47 ArrayRef<Value *> Srcs, fuzzerop::SourcePred Pred);
54 ArrayRef<Value *> Srcs, fuzzerop::SourcePred Pred);
55 Type *chooseType(LLVMContext &Context, ArrayRef<Value *> Srcs,
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| /third_party/mesa3d/src/gallium/drivers/r300/compiler/tests/ |
| D | rc_test_helpers.c | 354 struct match_info Srcs[3]; member
418 tokens.Srcs[j].String = in parse_rc_normal_instruction()
420 tokens.Srcs[j].Length = in parse_rc_normal_instruction()
424 (tokens.Srcs[j].Length + 1)); in parse_rc_normal_instruction()
425 strncpy(src_str, tokens.Srcs[j].String, in parse_rc_normal_instruction()
426 tokens.Srcs[j].Length); in parse_rc_normal_instruction()
427 src_str[tokens.Srcs[j].Length] = '\0'; in parse_rc_normal_instruction()
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| D | IceTargetLoweringARM32.cpp | 3021 Int32Operands Srcs(Src0, Src1); in lowerArithmetic() local
3037 if (Srcs.hasConstOperand()) { in lowerArithmetic()
3038 if (!Srcs.immediateIsFlexEncodable() && in lowerArithmetic()
3039 Srcs.negatedImmediateIsFlexEncodable()) { in lowerArithmetic()
3041 Variable *Src0R = Srcs.src0R(this); in lowerArithmetic()
3042 Operand *Src1F = Srcs.negatedSrc1F(this); in lowerArithmetic()
3043 if (!Srcs.swappedOperands()) { in lowerArithmetic()
3052 Variable *Src0R = Srcs.src0R(this); in lowerArithmetic()
3057 Operand *Src1RF = Srcs.src1RF(this); in lowerArithmetic()
3064 if (Srcs.hasConstOperand()) { in lowerArithmetic()
[all …]
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| D | IceInst.cpp | 74 Srcs.reserve(MaxSrcs); in Inst()
419 Srcs[I] = Target->getCfg()->getContext()->getConstantZero(Ty); in clearOperandForTarget()
493 Srcs[2] = Beacon; in setRmwBeacon()
1022 std::swap(Srcs[0], Srcs[1]); in reverseConditionAndOperands()
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| D | IceInst.h | 104 SizeT getSrcSize() const { return Srcs.size(); } in getSrcSize()
107 return Srcs[I]; in getSrc()
112 Srcs[Index] = Replacement; in replaceSource()
212 Srcs.push_back(Src); in addSource()
253 CfgVector<Operand *> Srcs; variable
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| D | IceTargetLowering.h | 469 Operands *...Srcs) { in scalarizeInstruction() argument
504 makeExtractThunk(Srcs)...); in scalarizeInstruction()
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| D | IceInstARM32.h | 1263 static InstARM32Push *create(Cfg *Func, const VarList &Srcs) { in create() argument
1264 return new (Func->allocate<InstARM32Push>()) InstARM32Push(Func, Srcs); in create()
1269 InstARM32Push(Cfg *Func, const VarList &Srcs);
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| D | IceInstARM32.cpp | 1471 InstARM32Push::InstARM32Push(Cfg *Func, const VarList &Srcs) in InstARM32Push() argument
1472 : InstARM32RegisterStackOp(Func, InstARM32::Push, Srcs.size(), nullptr) { in InstARM32Push()
1473 validatePushOrPopRegisterListOrDie(Srcs); in InstARM32Push()
1474 for (Variable *Source : Srcs) { in InstARM32Push()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | VirtRegMap.cpp | 421 ArrayRef<MachineInstr *> Srcs, in expandCopyBundle()
423 for (const MachineInstr *Src : Srcs) in expandCopyBundle()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | R600ControlFlowFinalizer.cpp | 366 const SmallVector<std::pair<MachineOperand *, int64_t>, 3> Srcs = in getLiteral() local
368 for (const auto &Src:Srcs) { in getLiteral()
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| D | R600InstrInfo.cpp | 437 const std::vector<std::pair<int, unsigned>> &Srcs = in isLegalUpTo() local
440 const std::pair<int, unsigned> &Src = Srcs[j]; in isLegalUpTo()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 696 SmallVector<Register, 4> Srcs = {MI.getOperand(1).getReg()}; in narrowScalar() local
698 Srcs.push_back(ZeroReg); in narrowScalar()
699 MIRBuilder.buildMerge(MI.getOperand(0).getReg(), Srcs); in narrowScalar()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 15174 int Srcs[2] = {-1, -1}; in lowerShuffleAsLanePermuteAndRepeatedMask() local
15186 if (Srcs[0] < 0 || Srcs[0] == LaneSrc) in lowerShuffleAsLanePermuteAndRepeatedMask()
15188 else if (Srcs[1] < 0 || Srcs[1] == LaneSrc) in lowerShuffleAsLanePermuteAndRepeatedMask()
15193 Srcs[Src] = LaneSrc; in lowerShuffleAsLanePermuteAndRepeatedMask()
15198 if (Srcs[1] < 0) in lowerShuffleAsLanePermuteAndRepeatedMask()
15201 LaneSrcs[Lane][0] = Srcs[0]; in lowerShuffleAsLanePermuteAndRepeatedMask()
15202 LaneSrcs[Lane][1] = Srcs[1]; in lowerShuffleAsLanePermuteAndRepeatedMask()
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