| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| D | RISCVSystemOperands.td | 20 class SysReg<string name, bits<12> op> {
37 let FilterClass = "SysReg";
57 def : SysReg<"ustatus", 0x000>;
58 def : SysReg<"uie", 0x004>;
59 def : SysReg<"utvec", 0x005>;
64 def : SysReg<"uscratch", 0x040>;
65 def : SysReg<"uepc", 0x041>;
66 def : SysReg<"ucause", 0x042>;
67 def : SysReg<"utval", 0x043>;
68 def : SysReg<"uip", 0x044>;
[all …]
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/MCTargetDesc/ |
| D | RISCVInstPrinter.cpp | 109 auto SysReg = RISCVSysReg::lookupSysRegByEncoding(Imm); in printCSRSystemRegister() local
110 if (SysReg && SysReg->haveRequiredFeatures(STI.getFeatureBits())) in printCSRSystemRegister()
111 O << SysReg->Name; in printCSRSystemRegister()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/AsmParser/ |
| D | RISCVAsmParser.cpp | 247 struct SysRegOp SysReg; member
269 SysReg = o.SysReg; in RISCVOperand()
627 return StringRef(SysReg.Data, SysReg.Length); in getSysReg()
691 Op->SysReg.Data = Str.data(); in createSysReg()
692 Op->SysReg.Length = Str.size(); in createSysReg()
693 Op->SysReg.Encoding = Encoding; in createSysReg()
743 Inst.addOperand(MCOperand::createImm(SysReg.Encoding)); in addCSRSystemRegisterOperands()
1097 auto SysReg = RISCVSysReg::lookupSysRegByEncoding(Imm); in parseCSRSystemRegister() local
1101 SysReg ? SysReg->Name : "", S, Imm, isRV64())); in parseCSRSystemRegister()
1115 auto SysReg = RISCVSysReg::lookupSysRegByName(Identifier); in parseCSRSystemRegister() local
[all …]
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ExpandPseudoInsts.cpp | 600 auto SysReg = AArch64SysReg::TPIDR_EL0; in expandMI() local
604 SysReg = AArch64SysReg::TPIDR_EL1; in expandMI()
606 SysReg = AArch64SysReg::TPIDR_EL3; in expandMI()
608 SysReg = AArch64SysReg::TPIDR_EL2; in expandMI()
610 SysReg = AArch64SysReg::TPIDR_EL1; in expandMI()
612 .addImm(SysReg); in expandMI()
|
| D | AArch64SystemOperands.td | 511 class SysReg<string name, bits<2> op0, bits<3> op1, bits<4> crn, bits<4> crm,
530 : SysReg<name, op0, op1, crn, crm, op2> {
537 : SysReg<name, op0, op1, crn, crm, op2> {
544 : SysReg<name, op0, op1, crn, crm, op2> {
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 416 struct SysRegOp SysReg; member
464 SysReg = o.SysReg; in AArch64Operand()
566 return StringRef(SysReg.Data, SysReg.Length); in getSysReg()
1001 return SysReg.MRSReg != -1U; in isMRSSystemRegister()
1006 return SysReg.MSRReg != -1U; in isMSRSystemRegister()
1011 return (SysReg.PStateField == AArch64PState::PAN || in isSystemPStateFieldWithImm0_1()
1012 SysReg.PStateField == AArch64PState::DIT || in isSystemPStateFieldWithImm0_1()
1013 SysReg.PStateField == AArch64PState::UAO || in isSystemPStateFieldWithImm0_1()
1014 SysReg.PStateField == AArch64PState::SSBS); in isSystemPStateFieldWithImm0_1()
1019 return SysReg.PStateField != -1U; in isSystemPStateFieldWithImm0_15()
[all …]
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/Utils/ |
| D | RISCVBaseInfo.h | 157 struct SysReg { struct
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Utils/ |
| D | AArch64BaseInfo.h | 529 struct SysReg { struct
544 const SysReg *lookupSysRegByName(StringRef); argument
545 const SysReg *lookupSysRegByEncoding(uint16_t);
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMInstrVFP.td | 2681 class vfp_vstrldr<bit opc, bit P, bit W, bits<4> SysReg, string sysreg,
2690 let Inst{22} = SysReg{3};
2694 let Inst{15-13} = SysReg{2-0};
2703 multiclass vfp_vstrldr_sysreg<bit opc, bits<4> SysReg, string sysreg,
2706 vfp_vstrldr<opc, 1, 0, SysReg, sysreg,
2713 vfp_vstrldr<opc, 1, 1, SysReg, sysreg,
2721 vfp_vstrldr<opc, 0, 1, SysReg, sysreg,
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/MCTargetDesc/ |
| D | AArch64InstPrinter.cpp | 1414 const AArch64SysReg::SysReg *Reg = AArch64SysReg::lookupSysRegByEncoding(Val); in printMRSSystemRegister()
1434 const AArch64SysReg::SysReg *Reg = AArch64SysReg::lookupSysRegByEncoding(Val); in printMSRSystemRegister()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenSystemOperands.inc | 2248 const SysReg *lookupSysRegByName(StringRef Name);
2249 const SysReg *lookupSysRegByEncoding(uint16_t Encoding);
2253 constexpr SysReg SysRegsList[] = {
3025 const SysReg *lookupSysRegByName(StringRef Name) {
3821 const SysReg *lookupSysRegByEncoding(uint16_t Encoding) {
|