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Searched refs:UW (Results 1 – 25 of 94) sorted by relevance

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/third_party/mesa3d/src/intel/tools/tests/gen4.5/
D	send.asm	`3 send(16) 1 null<1>UW g0<8,8,1>UW 0x85a04800 17 send(16) 1 g4<1>UW g0<8,8,1>UW 0x02780001 19 send(16) 1 g4<1>UW g0<8,8,1>UW 0x02580001 25 send(16) 1 g26<1>UW g0<8,8,1>UW 0x02382001 27 send(16) 1 g4<1>UW g0<8,8,1>UW 0x02983001 37 send(16) 1 g16<1>UW g0<8,8,1>UW 0x02380001 41 send(16) 13 g8<1>UW g0<8,8,1>F 0x02383001 45 send(16) 1 g4<1>UW g0<8,8,1>UW 0x02980001 47 send(16) 1 null<1>UW g0<8,8,1>UW 0x85e04800 51 send(8) 1 null<1>UW g0<8,8,1>UW 0x85604c00 [all …]`
D	add.asm	`1 add(16) g10<1>UW g1.4<2,4,0>UW 0x10101010V { align1 }; 2 add(8) g6<1>F g10<8,8,1>UW -g1<0,1,0>F { align1 }; 3 add(8) g8<1>F g10.8<8,8,1>UW -g1<0,1,0>F { align1 sechalf }; 14 add(8) a0<1>UW g4<16,8,2>UW 0x0040UW { align1 }; 15 add(8) a0<1>UW g5<16,8,2>UW 0x0040UW { align1 sechalf }; 21 add(8) g37<1>UW g1.4<2,4,0>UW 0x10101010V { align1 }; 29 add(16) g4.1<2>UW g4.1<16,8,2>UW g6<16,8,2>UW { align1 compr };`
/third_party/mesa3d/src/intel/tools/tests/gen4/
D	send.asm	`5 send(16) 1 null<1>UW g0<8,8,1>UW 0x85a04800 17 send(16) 1 g4<1>UW g0<8,8,1>UW 0x02780001 19 send(16) 1 g4<1>UW g0<8,8,1>UW 0x02580001 25 send(16) 1 g26<1>UW g0<8,8,1>UW 0x0238a001 27 send(16) 1 g4<1>UW g0<8,8,1>UW 0x0298c001 37 send(16) 1 g16<1>UW g0<8,8,1>UW 0x02380001 41 send(16) 13 g8<1>UW g0<8,8,1>F 0x0238c001 45 send(16) 1 g4<1>UW g0<8,8,1>UW 0x02980001 47 send(16) 1 g4<1>UW g0<8,8,1>UW 0x0298e001 51 send(8) 1 null<1>UW g0<8,8,1>UW 0x85604c00 [all …]`
D	add.asm	`1 add(16) g10<1>UW g1.4<2,4,0>UW 0x10101010V { align1 }; 2 add(16) g6<1>F g10<8,8,1>UW -g1<0,1,0>F { align1 compr }; 12 add(8) a0<1>UW g4<16,8,2>UW 0x0040UW { align1 }; 13 add(8) a0<1>UW g5<16,8,2>UW 0x0040UW { align1 sechalf }; 18 add(8) g37<1>UW g1.4<2,4,0>UW 0x10101010V { align1 }; 19 add(8) g37<1>F g37<8,8,1>UW -g1<0,1,0>F { align1 }; 27 add(16) g4.1<2>UW g4.1<16,8,2>UW g6<16,8,2>UW { align1 compr };`
/third_party/mesa3d/src/intel/tools/tests/gen5/
D	send.asm	`3 send(8) 1 null<1>UW g0<8,8,1>UW 0x8c084c00 7 send(16) 1 null<1>UW g0<8,8,1>UW 0x94084800 11 send(8) 2 g2<1>UW null<8,8,1>F 0x06410001 13 send(16) 2 g4<1>UW null<8,8,1>F 0x0c820001 15 send(8) 2 g2<1>UW null<8,8,1>F 0x04410001 17 send(16) 2 g4<1>UW null<8,8,1>F 0x08820001 23 send(8) 2 g13<1>UW null<8,8,1>F 0x0241a001 25 send(16) 2 g26<1>UW null<8,8,1>F 0x0482a001 27 send(8) 2 g2<1>UW null<8,8,1>F 0x08417001 29 send(16) 2 g4<1>UW null<8,8,1>F 0x10827001 [all …]`
D	add.asm	`1 add(8) g2<1>UW g1.4<2,4,0>UW 0x10101010V { align1 }; 2 add(8) g8<1>F g2<8,8,1>UW -g1<0,1,0>F { align1 }; 3 add(16) g10<1>UW g1.4<2,4,0>UW 0x10101010V { align1 }; 4 add(8) g8<1>F g10.8<8,8,1>UW -g1<0,1,0>F { align1 sechalf }; 29 add(8) g3.1<2>UW g3.1<16,8,2>UW g4<16,8,2>UW { align1 }; 30 add(16) g4.1<2>UW g4.1<16,8,2>UW g6<16,8,2>UW { align1 compr };`
/third_party/mesa3d/src/intel/tools/tests/gen9/
D	sendc.asm	`1 sendc(8) null<1>UW g124<0,1,0>F 0x88031400 3 sendc(16) null<1>UW g120<0,1,0>F 0x90031000 5 sendc(16) null<1>UW g114<0,1,0>F 0x82031100 7 sendc(8) null<1>UW g124<8,8,1>UD 0x880ba001 9 sendc(16) null<1>UW g121<8,8,1>UD 0x8e0da001 11 sendc(8) null<1>UW g125<8,8,1>UD 0x860a0001 13 sendc(16) null<1>UW g123<8,8,1>UD 0x8a0c0001 15 (+f0.1) sendc(8) null<1>UW g124<0,1,0>F 0x88031400 17 sendc(8) null<1>UW g122<8,8,1>UD 0x8c0be001 19 sendc(16) null<1>UW g117<8,8,1>UD 0x960de001 [all …]`
D	send.asm	`11 send(16) null<1>UW g127<8,8,1>UW 0x82000010 13 send(8) g124<1>UW g13<8,8,1>UD 0x0643a001 15 send(16) g120<1>UW g23<8,8,1>UD 0x0c85a001 23 send(8) g2<1>UW g10<8,8,1>UD 0x08427001 25 send(16) g2<1>UW g18<8,8,1>UD 0x10847001 45 send(8) g7<1>UW g7<8,8,1>UD 0x0443a000 47 send(8) g10<1>UW g6<8,8,1>UD 0x0222a001 49 send(8) g2<1>UW g19<8,8,1>UD 0x084a8001 51 send(16) g25<1>UW g16<8,8,1>UD 0x0444a001 53 send(16) g14<1>UW g7<8,8,1>UD 0x0e8c8001 [all …]`
D	mov.asm	`18 mov(8) g3<1>UW 0x76543210V { align1 WE_all 1Q }; 20 mov(16) g6<1>D g3<8,8,1>UW { align1 1H }; 23 mov(8) g2<1>F g6<8,4,1>UW { align1 1Q }; 25 mov(16) g2<1>F g10<8,4,1>UW { align1 1H }; 38 mov(8) g2<1>UW 0x76543210UV { align1 1Q }; 39 mov(8) g12<1>UD g2<8,8,1>UW { align1 1Q }; 43 mov(1) f0.1<1>UW g1.14<0,1,0>UW { align1 WE_all 1N }; 73 mov(16) g19<1>UD g15<16,8,2>UW { align1 1H }; 83 mov(1) f0<1>UW 0x0000UW { align1 WE_all 1N }; 91 mov(1) f1<1>UW f0.1<0,1,0>UW { align1 WE_all 1N }; [all …]`
D	shr.asm	`4 shr(16) g8<1>UW g1<1,8,0>UB 0x44440000V { align1 1H }; 6 shr(8) g3<1>UW g1.28<1,8,0>UB 0x76543210V { align1 1Q }; 7 shr(8) g3<2>UW g5<8,8,1>UD g4<8,8,1>UW { align1 1Q }; 8 shr(16) g20<2>UW g15<8,8,1>UD g13<8,8,1>UW { align1 1H };`
D	add.asm	`4 add(8) g3.8<1>UW g3<8,8,1>UW 0x0008UW { align1 WE_all 1Q }; 6 add(16) g6<1>UW g1.4<1,4,0>UW 0x11001010V { align1 WE_all 1H }; 7 add(32) g10<1>UW g1.4<1,4,0>UW 0x11001010V { align1 WE_all }; 13 add(8) a0<1>UW g34<16,8,2>UW 0x0080UW { align1 1Q }; 15 add(16) a0<1>UW g3<16,8,2>UW 0x0040UW { align1 1H };`
/third_party/mesa3d/src/intel/tools/tests/gen7/
D	send.asm	`5 send(8) g2<1>UW g8<8,8,1>UD 0x08427001 7 send(16) g2<1>UW g14<8,8,1>UD 0x10847001 23 send(8) null<1>UW g12<4,4,1>UD 0x02008004 35 send(8) g124<1>UW g11<8,8,1>UD 0x06420001 37 send(16) g120<1>UW g16<8,8,1>UD 0x0c840001 39 send(8) g124<1>UW g2<8,8,1>UD 0x04420001 41 send(16) g120<1>UW g2<8,8,1>UD 0x08840001 43 send(8) g124<1>UW g7<8,8,1>UD 0x144a4001 45 send(8) g124<1>UW g8<8,8,1>UD 0x084a4001 49 send(8) g2<1>UW g7<8,8,1>UD 0x0a4a6001 [all …]`
D	sendc.asm	`1 sendc(8) null<1>UW g124<8,8,1>F 0x88031400 3 sendc(16) null<1>UW g120<8,8,1>F 0x90031000 5 sendc(16) null<1>UW g114<8,8,1>F 0x82031100 7 sendc(8) null<1>UW g122<8,8,1>F 0x8c0b1401 9 sendc(16) null<1>UW g118<8,8,1>F 0x940b1001 11 sendc(8) null<1>UW g13<8,8,1>F 0x0e0b0401 13 sendc(8) null<1>UW g121<8,8,1>F 0x8e0b1402 15 sendc(16) null<1>UW g7<8,8,1>F 0x180b0001 17 sendc(16) null<1>UW g116<8,8,1>F 0x980b1002 19 sendc(8) null<1>UW g123<8,8,1>F 0x8a031400 [all …]`
D	add.asm	1 add(16) g6<1>UW g1.4<1,4,0>UW 0x11001010V { align1 WE_all 1H }; 2 add(16) g4<1>UW g1.4<2,4,0>UW 0x10101010V { align1 1H }; 5 add(1) a0<1>UW g11<0,1,0>UW 0x0008UW { align1 WE_all 1N }; 32 add(8) a0<1>UW g3<16,8,2>UW 0x004cUW { align1 1Q }; 33 add(8) a0<1>UW g4<16,8,2>UW 0x004cUW { align1 2Q }; 34 add(8) g4.1<2>UW g4.1<16,8,2>UW g16<16,8,2>UW { align1 1Q }; 35 add(16) g4.1<2>UW g4.1<16,8,2>UW g10<16,8,2>UW { align1 1H }; 45 add(8) g2<1>UD g9<0,1,0>UD g8<1,4,0>UW { align1 1Q }; 46 add(8) g3<1>UD g9<0,1,0>UD g8.2<1,4,0>UW { align1 2Q };
/third_party/mesa3d/src/intel/tools/tests/gen7.5/
D	sendc.asm	`1 sendc(8) null<1>UW g124<8,8,1>F 0x88031400 3 sendc(16) null<1>UW g120<8,8,1>F 0x90031000 5 sendc(16) null<1>UW g114<8,8,1>F 0x82031100 7 (+f0.1) sendc(8) null<1>UW g124<8,8,1>F 0x88031400 9 (+f0.1) sendc(16) null<1>UW g120<8,8,1>F 0x90031000 11 sendc(8) null<1>UW g13<8,8,1>F 0x0e0b0401 13 sendc(8) null<1>UW g121<8,8,1>F 0x8e0b1402 15 sendc(16) null<1>UW g7<8,8,1>F 0x180b0001 17 sendc(16) null<1>UW g116<8,8,1>F 0x980b1002 19 sendc(8) null<1>UW g123<8,8,1>F 0x8a031400 [all …]`
D	send.asm	`5 send(8) g124<1>UW g13<8,8,1>UD 0x08427001 7 send(16) g120<1>UW g10<8,8,1>UD 0x10847001 23 send(8) null<1>UW g12<4,4,1>UD 0x02008004 41 send(8) g124<1>UW g2<8,8,1>UD 0x04420001 43 send(16) g120<1>UW g2<8,8,1>UD 0x08840001 45 send(8) g6<1>UW g6<8,8,1>UD 0x0643d001 47 send(16) g8<1>UW g16<8,8,1>UD 0x0c85d001 49 send(8) g8<1>UW g17<8,8,1>UD 0x0a43e001 51 send(16) g48<1>UW g10<8,8,1>UD 0x1485e001 53 send(8) g124<1>UW g11<8,8,1>UD 0x06420001 [all …]`
D	add.asm	3 add(16) g6<1>UW g1.4<1,4,0>UW 0x11001010V { align1 WE_all 1H }; 4 add(16) g4<1>UW g1.4<2,4,0>UW 0x10101010V { align1 1H }; 7 add(1) a0<1>UW g11<0,1,0>UW 0x0008UW { align1 WE_all 1N }; 20 add(8) a0<1>UW g3<16,8,2>UW 0x0040UW { align1 1Q }; 21 add(8) a0<1>UW g4<16,8,2>UW 0x0040UW { align1 2Q }; 38 add(8) g3.1<2>UW g3.1<16,8,2>UW g13<16,8,2>UW { align1 1Q }; 39 add(16) g3.1<2>UW g3.1<16,8,2>UW g5<16,8,2>UW { align1 1H }; 40 add(8) g16<1>UD g29<0,1,0>UD g26<1,4,0>UW { align1 1Q }; 41 add(8) g17<1>UD g29<0,1,0>UD g26.2<1,4,0>UW { align1 2Q };
/third_party/mesa3d/src/intel/tools/tests/gen8/
D	sendc.asm	`1 sendc(8) null<1>UW g124<8,8,1>F 0x88031400 3 sendc(16) null<1>UW g120<8,8,1>F 0x90031000 5 sendc(16) null<1>UW g114<8,8,1>F 0x82031100 7 (+f0.1) sendc(8) null<1>UW g124<8,8,1>F 0x88031400 9 sendc(8) null<1>UW g122<8,8,1>F 0x8c0b1401 11 sendc(16) null<1>UW g118<8,8,1>F 0x940b1001 13 sendc(8) null<1>UW g13<8,8,1>F 0x0e0b0401 15 sendc(8) null<1>UW g121<8,8,1>F 0x8e0b1402 17 sendc(16) null<1>UW g7<8,8,1>F 0x180b0001 19 sendc(16) null<1>UW g116<8,8,1>F 0x980b1002 [all …]`
D	send.asm	`11 send(8) null<1>UW g3<8,8,1>UD 0x0e0b5001 13 send(8) null<1>UW g1<8,8,1>UD 0x0e0b6001 15 send(16) null<1>UW g127<8,8,1>UW 0x82000010 17 send(8) g124<1>UW g13<8,8,1>UD 0x08427001 19 send(16) g120<1>UW g10<8,8,1>UD 0x10847001 49 send(8) g7<1>UW g7<8,8,1>UD 0x04427000 57 send(8) g124<1>UW g2<8,8,1>UD 0x04420001 59 send(16) g120<1>UW g2<8,8,1>UD 0x08840001 61 send(8) g6<1>UW g6<8,8,1>UD 0x0643d001 63 send(16) g8<1>UW g16<8,8,1>UD 0x0c85d001 [all …]`
D	mov.asm	17 mov(8) g10<1>UW 0x76543210V { align1 WE_all 1Q }; 21 mov(16) g13<1>D g10<8,8,1>UW { align1 1H }; 26 mov(8) g2<1>F g6<8,4,1>UW { align1 1Q }; 29 mov(16) g25<1>F g18<8,4,1>UW { align1 1H }; 42 mov(8) g2<1>UW 0x76543210UV { align1 1Q }; 43 mov(8) g12<1>UD g2<8,8,1>UW { align1 1Q }; 47 mov(1) f0.1<1>UW g1.14<0,1,0>UW { align1 WE_all 1N }; 77 mov(8) g123<1>UW g2<16,8,2>UW { align1 WE_all 1Q }; 78 mov(16) g119<1>UW g2<16,8,2>UW { align1 WE_all 1H }; 80 mov(16) g19<1>UD g15<16,8,2>UW { align1 1H }; [all …]
D	shr.asm	`3 shr(16) g4<1>UW g1<1,8,0>UB 0x44440000V { align1 1H }; 6 shr(8) g3<1>UW g1.28<1,8,0>UB 0x76543210V { align1 1Q }; 7 shr(8) g3<2>UW g5<8,8,1>UD g4<8,8,1>UW { align1 1Q }; 8 shr(16) g20<2>UW g15<8,8,1>UD g13<8,8,1>UW { align1 1H };`
D	add.asm	`4 add(8) g10.8<1>UW g10<8,8,1>UW 0x0008UW { align1 WE_all 1Q }; 6 add(16) g6<1>UW g1.4<1,4,0>UW 0x11001010V { align1 WE_all 1H }; 7 add(32) g18<1>UW g1.4<1,4,0>UW 0x11001010V { align1 WE_all }; 14 add(8) a0<1>UW g34<16,8,2>UW 0x0080UW { align1 1Q }; 16 add(16) a0<1>UW g3<16,8,2>UW 0x0040UW { align1 1H };`
/third_party/mesa3d/src/intel/tools/tests/gen6/
D	send.asm	`5 send(8) g2<1>UW m2<8,8,1>F 0x08417001 7 send(16) g2<1>UW m2<8,8,1>F 0x10827001 15 send(8) g2<1>UW m1<8,8,1>F 0x16494001 17 send(8) g2<1>UW m1<8,8,1>F 0x0e494001 19 send(8) g3<1>UW m1<8,8,1>F 0x0e496001 21 send(8) g7<1>UW m1<8,8,1>F 0x0e496102 37 send(8) g7<1>UW m2<8,8,1>F 0x04410001 39 send(16) g9<1>UW m2<8,8,1>F 0x08820001 41 send(8) g7<1>UW m2<8,8,1>F 0x02410001 43 send(16) g9<1>UW m2<8,8,1>F 0x04820001 [all …]`
D	sendc.asm	`1 sendc(8) null<1>UW m1<8,8,1>F 0x88019400 3 sendc(16) null<1>UW m1<8,8,1>F 0x90019000 5 sendc(16) null<1>UW m2<8,8,1>F 0x82019100 7 sendc(8) null<1>UW m1<8,8,1>F 0x8c099401 9 sendc(16) null<1>UW m1<8,8,1>F 0x94099001 11 sendc(8) null<1>UW m1<8,8,1>F 0x0e098401 13 sendc(8) null<1>UW m1<8,8,1>F 0x8e099402 15 sendc(16) null<1>UW m1<8,8,1>F 0x18098001 17 sendc(16) null<1>UW m1<8,8,1>F 0x98099002 19 sendc(8) null<1>UW m1<8,8,1>F 0x0c098400 [all …]`
D	add.asm	1 add(16) g6<1>UW g1.4<1,4,0>UW 0x11001010V { align1 WE_all 1H }; 2 add(16) g4<1>UW g1.4<2,4,0>UW 0x10101010V { align1 1H }; 17 add(8) a0<1>UW g3<16,8,2>UW 0x0040UW { align1 1Q }; 18 add(8) a0<1>UW g4<16,8,2>UW 0x0040UW { align1 2Q }; 51 add(8) g3.1<2>UW g3.1<16,8,2>UW g13<16,8,2>UW { align1 1Q }; 52 add(16) g3.1<2>UW g3.1<16,8,2>UW g5<16,8,2>UW { align1 1H }; 55 add(8) g2<1>UD g22<0,1,0>UD g12<1,4,0>UW { align1 1Q }; 56 add(8) g3<1>UD g22<0,1,0>UD g12.2<1,4,0>UW { align1 2Q }; 68 add(8) m10<1>UD g13<0,1,0>UD g10<1,4,0>UW { align1 1Q }; 69 add(8) m11<1>UD g13<0,1,0>UD g10.2<1,4,0>UW { align1 2Q };

12 3 4