| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUUnifyDivergentExitNodes.cpp | 153 Value *Undef = UndefValue::get(B.getFloatTy()); in unifyReturnBlockSet() local
158 Undef, Undef, Undef, Undef, // values in unifyReturnBlockSet()
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| D | SIInsertSkips.cpp | 170 .addReg(AMDGPU::VGPR0, RegState::Undef) in skipIfDead()
171 .addReg(AMDGPU::VGPR0, RegState::Undef) in skipIfDead()
172 .addReg(AMDGPU::VGPR0, RegState::Undef) in skipIfDead()
173 .addReg(AMDGPU::VGPR0, RegState::Undef) in skipIfDead()
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| D | SIFormMemoryClauses.cpp | 143 S |= RegState::Undef; in getMopState()
379 S &= ~(RegState::Undef | RegState::Dead); in runOnMachineFunction()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Scalar/ |
| D | StructurizeCFG.cpp | 598 Value *Undef = UndefValue::get(Phi.getType()); in addPhiValues() local
599 Phi.addIncoming(Undef, From); in addPhiValues()
618 Value *Undef = UndefValue::get(Phi->getType()); in setPhiValues() local
620 Updater.AddAvailableValue(&Func->getEntryBlock(), Undef); in setPhiValues()
621 Updater.AddAvailableValue(To, Undef); in setPhiValues()
631 Updater.AddAvailableValue(Dominator.result(), Undef); in setPhiValues()
930 Value *Undef = UndefValue::get(I.getType()); in rebuildSSA() local
932 Updater.AddAvailableValue(&Func->getEntryBlock(), Undef); in rebuildSSA()
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| D | LowerMatrixIntrinsics.cpp | 249 Value *Undef = UndefValue::get(VType); in getMatrix() local
253 Value *V = Builder.CreateShuffleVector(MatrixVal, Undef, Mask, "split"); in getMatrix()
620 Value *Undef = UndefValue::get(Col->getType()); in extractVector() local
622 return Builder.CreateShuffleVector(Col, Undef, Mask, "block"); in extractVector()
637 Value *Undef = UndefValue::get(Block->getType()); in insertVector() local
638 Block = Builder.CreateShuffleVector(Block, Undef, ExtendMask); in insertVector()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | MachineInstrBuilder.h | 48 Undef = 0x20, enumerator
53 DefineNoRead = Define | Undef,
97 flags & RegState::Undef,
483 return B ? RegState::Undef : 0; in getUndefRegState()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86WinAllocaExpander.cpp | 221 .addReg(RegA, RegState::Undef); in lower()
235 .addReg(RegA, RegState::Undef); in lower()
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| D | X86FixupBWInsts.cpp | 335 .addReg(NewSrcReg, RegState::Undef) in tryReplaceCopy()
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| D | X86InstrInfo.cpp | 746 .addReg(NewSrc, RegState::Define | RegState::Undef, X86::sub_32bit) in classifyLEAReg()
3883 MIB.addReg(Reg, RegState::Undef).addReg(Reg, RegState::Undef); in Expand2AddrUndef()
3900 MIB.addReg(Reg, RegState::Undef).addReg(Reg, RegState::Undef); in Expand2AddrKreg()
3912 .addReg(Reg, RegState::Undef) in expandMOV32r1()
3913 .addReg(Reg, RegState::Undef); in expandMOV32r1()
4008 MIB.addReg(TRI->getFrameRegister(MF), RegState::Undef); in expandXorFP()
4156 MIB.addReg(Reg, RegState::Undef).addReg(Reg, RegState::Undef).addImm(0xf); in expandPostRAPseudo()
4164 MIB.addReg(Reg, RegState::Undef).addReg(Reg, RegState::Undef) in expandPostRAPseudo()
4165 .addReg(Reg, RegState::Undef).addImm(0xff); in expandPostRAPseudo()
4179 MIB.addReg(Reg, RegState::Undef).addReg(MaskReg, MaskState) in expandPostRAPseudo()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | CombinerHelper.cpp | 130 MachineInstr *Undef = nullptr; in matchCombineConcatVectors() local
150 if (!Undef) { in matchCombineConcatVectors()
152 Undef = Builder.buildUndef(OpType.getScalarType()); in matchCombineConcatVectors()
154 assert(MRI.getType(Undef->getOperand(0).getReg()) == in matchCombineConcatVectors()
161 Ops.push_back(Undef->getOperand(0).getReg()); in matchCombineConcatVectors()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | RDFLiveness.cpp | 118 if (RefA.Addr->getFlags() & NodeAttrs::Undef) in getAllReachingDefs()
394 if (!(UA.Addr->getFlags() & NodeAttrs::Undef)) { in getAllReachedUses()
476 if ((F & (NodeAttrs::Undef | NodeAttrs::PhiRef)) == 0) { in computePhiInfo()
521 assert((UA.Addr->getFlags() & NodeAttrs::Undef) == 0); in computePhiInfo()
1074 if (UA.Addr->getFlags() & NodeAttrs::Undef) in traverse()
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| D | HexagonInstrInfo.cpp | 1139 .addReg(Reg, RegState::Undef) in expandPostRAPseudo()
1140 .addReg(Reg, RegState::Undef); in expandPostRAPseudo()
1147 .addReg(Reg, RegState::Undef) in expandPostRAPseudo()
1148 .addReg(Reg, RegState::Undef); in expandPostRAPseudo()
1154 .addReg(Hexagon::V0, RegState::Undef) in expandPostRAPseudo()
1155 .addReg(Hexagon::V0, RegState::Undef); in expandPostRAPseudo()
1161 .addReg(Hexagon::V0, RegState::Undef) in expandPostRAPseudo()
1162 .addReg(Hexagon::V0, RegState::Undef); in expandPostRAPseudo()
1169 .addReg(Vd, RegState::Undef) in expandPostRAPseudo()
1170 .addReg(Vd, RegState::Undef); in expandPostRAPseudo()
[all …]
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| D | HexagonISelDAGToDAGHVX.cpp | 627 return OpRef(R.OpN & (Undef | Index | LoHalf)); in lo()
631 return OpRef(R.OpN & (Undef | Index | HiHalf)); in hi()
633 static OpRef undef(MVT Ty) { return OpRef(Undef | Ty.SimpleTy); } in undef()
650 Undef = 0x80000000, enumerator
719 if (OpN & Undef) { in print()
997 if (R.OpN & OpRef::Undef) { in materialize()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64CallLowering.cpp | 323 auto Undef = MIRBuilder.buildUndef({OldLLT}); in lowerReturn() local
325 MIRBuilder.buildMerge({NewLLT}, {CurVReg, Undef.getReg(0)}) in lowerReturn()
336 auto Undef = MIRBuilder.buildUndef({OldLLT}); in lowerReturn() local
339 .buildBuildVector({NewLLT}, {CurVReg, Undef.getReg(0)}) in lowerReturn()
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| /third_party/glslang/Test/baseResults/ |
| D | spv.functionCall.frag.out | 124 55: 6(float) Undef
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| D | hlsl.whileLoop.frag.out | 194 42: 7(fvec4) Undef
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| D | hlsl.logicalConvert.frag.out | 340 46: 7(fvec4) Undef
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| D | IceTargetLowering.h | 480 auto *Undef = ConstantUndef::create(Ctx, DestTy); in scalarizeInstruction() local
481 Context.insert<InstAssign>(T, Undef); in scalarizeInstruction()
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| /third_party/spirv-tools/test/val/ |
| D | val_state_test.cpp | 156 TEST_F(ValidationState_InLayoutState, Undef) { in TEST_F() argument
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| /third_party/skia/third_party/externals/spirv-tools/test/val/ |
| D | val_state_test.cpp | 156 TEST_F(ValidationState_InLayoutState, Undef) { in TEST_F() argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Tools/test/val/ |
| D | val_state_test.cpp | 156 TEST_F(ValidationState_InLayoutState, Undef) { in TEST_F() argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Coroutines/ |
| D | Coroutines.cpp | 329 auto *Undef = UndefValue::get(Type::getInt8PtrTy(F.getContext())); in buildFrom() local
331 CF->replaceAllUsesWith(Undef); in buildFrom()
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| /third_party/mindspore/tests/ut/cpp/python_input/gtest_input/pipeline/parse/ |
| D | parser_test.py | 302 a = x + y + Undef
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineSimplifyDemanded.cpp | 1147 Constant *Undef = UndefValue::get(EltTy); in SimplifyDemandedVectorElts() local
1151 Elts.push_back(Undef); in SimplifyDemandedVectorElts()
1160 Elts.push_back(Undef); in SimplifyDemandedVectorElts()
1198 APInt Demanded, APInt &Undef) { in SimplifyDemandedVectorElts() argument
1201 if (Value *V = SimplifyDemandedVectorElts(Op, Demanded, Undef, Depth + 1)) { in SimplifyDemandedVectorElts()
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| D | InstCombinePHI.cpp | 1131 Value *Undef = UndefValue::get(FirstPhi.getType()); in SliceUpIllegalIntegerPHI() local
1133 replaceInstUsesWith(*PHIsToSlice[i], Undef); in SliceUpIllegalIntegerPHI()
1134 return replaceInstUsesWith(FirstPhi, Undef); in SliceUpIllegalIntegerPHI()
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