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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsCallLowering.cpp27 bool MipsCallLowering::MipsHandler::assign(Register VReg, const CCValAssign &VA, in assign() argument
29 if (VA.isRegLoc()) { in assign()
30 assignValueToReg(VReg, VA, VT); in assign()
31 } else if (VA.isMemLoc()) { in assign()
32 assignValueToAddress(VReg, VA); in assign()
96 void assignValueToReg(Register ValVReg, const CCValAssign &VA,
99 Register getStackAddress(const CCValAssign &VA,
102 void assignValueToAddress(Register ValVReg, const CCValAssign &VA) override;
113 void buildLoad(Register Val, const CCValAssign &VA) { in buildLoad() argument
115 Register Addr = getStackAddress(VA, MMO); in buildLoad()
[all …]
DMipsCallLowering.h46 bool assign(Register VReg, const CCValAssign &VA, const EVT &VT);
48 virtual Register getStackAddress(const CCValAssign &VA,
51 virtual void assignValueToReg(Register ValVReg, const CCValAssign &VA,
55 const CCValAssign &VA) = 0;
DMipsFastISel.cpp1156 CCValAssign &VA = ArgLocs[i]; in processCallArgs() local
1157 const Value *ArgVal = CLI.OutVals[VA.getValNo()]; in processCallArgs()
1158 MVT ArgVT = OutVTs[VA.getValNo()]; in processCallArgs()
1163 VA.convertToReg(Mips::F12); in processCallArgs()
1166 VA.convertToReg(Mips::D6_64); in processCallArgs()
1168 VA.convertToReg(Mips::D6); in processCallArgs()
1173 VA.convertToReg(Mips::F14); in processCallArgs()
1176 VA.convertToReg(Mips::D7_64); in processCallArgs()
1178 VA.convertToReg(Mips::D7); in processCallArgs()
1184 VA.isMemLoc()) { in processCallArgs()
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DMipsISelLowering.cpp3255 CCValAssign &VA = ArgLocs[i]; in LowerCall() local
3256 MVT ValVT = VA.getValVT(), LocVT = VA.getLocVT(); in LowerCall()
3273 VA); in LowerCall()
3279 switch (VA.getLocInfo()) { in LowerCall()
3283 if (VA.isRegLoc()) { in LowerCall()
3295 Register LocRegLo = VA.getLocReg(); in LowerCall()
3328 unsigned LocSizeInBits = VA.getLocVT().getSizeInBits(); in LowerCall()
3330 ISD::SHL, DL, VA.getLocVT(), Arg, in LowerCall()
3331 DAG.getConstant(LocSizeInBits - ValSizeInBits, DL, VA.getLocVT())); in LowerCall()
3336 if (VA.isRegLoc()) { in LowerCall()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMCallLowering.cpp116 CCValAssign &VA) override { in assignValueToReg()
117 assert(VA.isRegLoc() && "Value shouldn't be assigned to reg"); in assignValueToReg()
118 assert(VA.getLocReg() == PhysReg && "Assigning to the wrong reg?"); in assignValueToReg()
120 assert(VA.getValVT().getSizeInBits() <= 64 && "Unsupported value size"); in assignValueToReg()
121 assert(VA.getLocVT().getSizeInBits() <= 64 && "Unsupported location size"); in assignValueToReg()
123 Register ExtReg = extendRegister(ValVReg, VA); in assignValueToReg()
129 MachinePointerInfo &MPO, CCValAssign &VA) override { in assignValueToAddress()
133 Register ExtReg = extendRegister(ValVReg, VA); in assignValueToAddress()
135 MPO, MachineMemOperand::MOStore, VA.getLocVT().getStoreSize(), in assignValueToAddress()
144 CCValAssign VA = VAs[0]; in assignCustomValue() local
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DARMFastISel.cpp1903 CCValAssign &VA = ArgLocs[i]; in ProcessCallArgs() local
1904 MVT ArgVT = ArgVTs[VA.getValNo()]; in ProcessCallArgs()
1911 if (VA.isRegLoc() && !VA.needsCustom()) { in ProcessCallArgs()
1913 } else if (VA.needsCustom()) { in ProcessCallArgs()
1915 if (VA.getLocVT() != MVT::f64 || in ProcessCallArgs()
1917 !VA.isRegLoc() || !ArgLocs[++i].isRegLoc()) in ProcessCallArgs()
1953 CCValAssign &VA = ArgLocs[i]; in ProcessCallArgs() local
1954 const Value *ArgVal = Args[VA.getValNo()]; in ProcessCallArgs()
1955 Register Arg = ArgRegs[VA.getValNo()]; in ProcessCallArgs()
1956 MVT ArgVT = ArgVTs[VA.getValNo()]; in ProcessCallArgs()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/
DCallLowering.cpp292 CCValAssign &VA = ArgLocs[j]; in handleAssignments() local
293 assert(VA.getValNo() == i && "Location doesn't correspond to current arg"); in handleAssignments()
295 if (VA.needsCustom()) { in handleAssignments()
304 MVT VAVT = VA.getValVT(); in handleAssignments()
305 if (VA.isRegLoc()) { in handleAssignments()
317 VA = ArgLocs[j + Part]; in handleAssignments()
318 Handler.assignValueToReg(Args[i].Regs[Part], VA.getLocReg(), VA); in handleAssignments()
329 Handler.assignValueToReg(NewReg, VA.getLocReg(), VA); in handleAssignments()
352 VA = ArgLocs[j + Part]; in handleAssignments()
353 Handler.assignValueToReg(Args[i].Regs[Part], VA.getLocReg(), VA); in handleAssignments()
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/third_party/boost/libs/numeric/ublas/test/
Dsparse_view_test.cpp43 const double VA[] = { 1.0, 2.0, 3.0, 9.0, 1.0, 4.0 }; variable
61 …std::cout << ( ublas::make_compressed_matrix_view<ublas::row_major,IB>(3,4,NNZ,IA,JA,VA) ) << std:… in BOOST_AUTO_TEST_CASE()
65 COMPMATVIEW viewA(3,4,NNZ,IA,JA,VA); in BOOST_AUTO_TEST_CASE()
79 … , ublas::c_array_view<const double>(6,&(VA[0]))) ) << std::endl; in BOOST_AUTO_TEST_CASE()
87 std::copy(&(VA[0]),&(VA[6]),va); in BOOST_AUTO_TEST_CASE()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/
DARCISelLowering.cpp263 CCValAssign &VA = ArgLocs[i]; in LowerCall() local
267 switch (VA.getLocInfo()) { in LowerCall()
273 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
276 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
279 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
285 if (VA.isRegLoc()) { in LowerCall()
286 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); in LowerCall()
288 assert(VA.isMemLoc() && "Must be register or memory argument."); in LowerCall()
293 SDValue SOffset = DAG.getIntPtrConstant(VA.getLocMemOffset(), dl); in LowerCall()
377 const CCValAssign &VA = RVLocs[i]; in lowerCallResult() local
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonDepIICHVX.td116 InstrItinData <tc_05ac6f98, /*SLOT1,LOAD,VA*/
137 InstrItinData <tc_0ec46cf9, /*SLOT0123,VA*/
165 InstrItinData <tc_191381c1, /*SLOT0,STORE,VA*/
176 InstrItinData <tc_1ba8a0cd, /*SLOT01,LOAD,VA*/
187 InstrItinData <tc_257f6f7c, /*SLOT0123,VA*/
222 InstrItinData <tc_3aacf4a8, /*SLOT0123,VA*/
244 InstrItinData <tc_3e2aaafc, /*SLOT0,STORE,VA*/
250 InstrItinData <tc_447d9895, /*SLOT0,STORE,VA*/
256 InstrItinData <tc_453fe68d, /*SLOT01,LOAD,VA*/
277 InstrItinData <tc_540c3da3, /*SLOT0,VA*/
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/
DSparcISelLowering.cpp234 CCValAssign &VA = RVLocs[i]; in LowerReturn_32() local
235 assert(VA.isRegLoc() && "Can only return in registers!"); in LowerReturn_32()
239 if (VA.needsCustom()) { in LowerReturn_32()
240 assert(VA.getLocVT() == MVT::v2i32); in LowerReturn_32()
251 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Part0, Flag); in LowerReturn_32()
253 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn_32()
254 VA = RVLocs[++i]; // skip ahead to next loc in LowerReturn_32()
255 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Part1, in LowerReturn_32()
258 Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Arg, Flag); in LowerReturn_32()
262 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn_32()
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/third_party/libphonenumber/resources/geocoding/en/
D1.txt3810 1276223|Wytheville, VA
3811 1276228|Wytheville, VA
3812 1276236|Galax, VA
3813 1276238|Galax, VA
3814 1276322|Bluefield, VA
3815 1276326|Bluefield, VA
3816 1276328|Wise, VA
3817 1276346|Jonesville, VA
3818 1276386|Gate City, VA
3819 1276395|Coeburn, VA
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/
DBPFISelLowering.cpp226 for (auto &VA : ArgLocs) { in LowerFormalArguments() local
227 if (VA.isRegLoc()) { in LowerFormalArguments()
229 EVT RegVT = VA.getLocVT(); in LowerFormalArguments()
241 RegInfo.addLiveIn(VA.getLocReg(), VReg); in LowerFormalArguments()
246 if (VA.getLocInfo() == CCValAssign::SExt) in LowerFormalArguments()
248 DAG.getValueType(VA.getValVT())); in LowerFormalArguments()
249 else if (VA.getLocInfo() == CCValAssign::ZExt) in LowerFormalArguments()
251 DAG.getValueType(VA.getValVT())); in LowerFormalArguments()
253 if (VA.getLocInfo() != CCValAssign::Full) in LowerFormalArguments()
254 ArgValue = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), ArgValue); in LowerFormalArguments()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86CallLowering.cpp125 CCValAssign &VA) override { in assignValueToReg()
137 unsigned ValSize = VA.getValVT().getSizeInBits(); in assignValueToReg()
138 unsigned LocSize = VA.getLocVT().getSizeInBits(); in assignValueToReg()
144 ExtReg = extendRegister(ValVReg, VA); in assignValueToReg()
150 MachinePointerInfo &MPO, CCValAssign &VA) override { in assignValueToAddress()
151 Register ExtReg = extendRegister(ValVReg, VA); in assignValueToAddress()
153 MPO, MachineMemOperand::MOStore, VA.getLocVT().getStoreSize(), in assignValueToAddress()
250 MachinePointerInfo &MPO, CCValAssign &VA) override { in assignValueToAddress()
258 CCValAssign &VA) override { in assignValueToReg()
261 switch (VA.getLocInfo()) { in assignValueToReg()
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DX86FastISel.cpp1207 CCValAssign &VA = ValLocs[0]; in X86SelectRet() local
1210 if (VA.getLocInfo() != CCValAssign::Full) in X86SelectRet()
1213 if (!VA.isRegLoc()) in X86SelectRet()
1218 if (VA.getLocReg() == X86::FP0 || VA.getLocReg() == X86::FP1) in X86SelectRet()
1221 unsigned SrcReg = Reg + VA.getValNo(); in X86SelectRet()
1223 EVT DstVT = VA.getValVT(); in X86SelectRet()
1247 Register DstReg = VA.getLocReg(); in X86SelectRet()
1256 RetRegs.push_back(VA.getLocReg()); in X86SelectRet()
3320 CCValAssign const &VA = ArgLocs[i]; in fastLowerCall() local
3321 const Value *ArgVal = OutVals[VA.getValNo()]; in fastLowerCall()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVISelLowering.cpp1577 CCValAssign VA = PendingLocs[0]; in CC_RISCV() local
1581 return CC_RISCVAssign2XLen(XLen, State, VA, AF, ValNo, ValVT, LocVT, in CC_RISCV()
1680 const CCValAssign &VA, const SDLoc &DL) { in convertLocVTToValVT() argument
1681 switch (VA.getLocInfo()) { in convertLocVTToValVT()
1687 if (VA.getLocVT() == MVT::i64 && VA.getValVT() == MVT::f32) { in convertLocVTToValVT()
1691 Val = DAG.getNode(ISD::BITCAST, DL, VA.getValVT(), Val); in convertLocVTToValVT()
1700 const CCValAssign &VA, const SDLoc &DL) { in unpackFromRegLoc() argument
1703 EVT LocVT = VA.getLocVT(); in unpackFromRegLoc()
1723 RegInfo.addLiveIn(VA.getLocReg(), VReg); in unpackFromRegLoc()
1726 if (VA.getLocInfo() == CCValAssign::Indirect) in unpackFromRegLoc()
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/third_party/gstreamer/gstplugins_bad/sys/msdk/
Dmsdk_libva.c51 #define FOURCC_MFX_TO_VA(MFX, VA) \ argument
52 { MFX_FOURCC_##MFX, VA_FOURCC_##VA }
54 #define RT_MFX_TO_VA(MFX, VA) \ argument
55 { MFX_CHROMAFORMAT_##MFX, VA_RT_FORMAT_##VA }
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/
DLanaiISelLowering.cpp457 CCValAssign &VA = ArgLocs[i]; in LowerCCCArguments() local
458 if (VA.isRegLoc()) { in LowerCCCArguments()
460 EVT RegVT = VA.getLocVT(); in LowerCCCArguments()
464 RegInfo.addLiveIn(VA.getLocReg(), VReg); in LowerCCCArguments()
470 if (VA.getLocInfo() == CCValAssign::SExt) in LowerCCCArguments()
472 DAG.getValueType(VA.getValVT())); in LowerCCCArguments()
473 else if (VA.getLocInfo() == CCValAssign::ZExt) in LowerCCCArguments()
475 DAG.getValueType(VA.getValVT())); in LowerCCCArguments()
477 if (VA.getLocInfo() != CCValAssign::Full) in LowerCCCArguments()
478 ArgValue = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), ArgValue); in LowerCCCArguments()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/
DMSP430ISelLowering.cpp640 CCValAssign &VA = ArgLocs[i]; in LowerCCCArguments() local
641 if (VA.isRegLoc()) { in LowerCCCArguments()
643 EVT RegVT = VA.getLocVT(); in LowerCCCArguments()
655 RegInfo.addLiveIn(VA.getLocReg(), VReg); in LowerCCCArguments()
661 if (VA.getLocInfo() == CCValAssign::SExt) in LowerCCCArguments()
663 DAG.getValueType(VA.getValVT())); in LowerCCCArguments()
664 else if (VA.getLocInfo() == CCValAssign::ZExt) in LowerCCCArguments()
666 DAG.getValueType(VA.getValVT())); in LowerCCCArguments()
668 if (VA.getLocInfo() != CCValAssign::Full) in LowerCCCArguments()
669 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerCCCArguments()
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/third_party/flutter/skia/src/sfnt/
DSkOTTable_OS_2.h31 struct VA : SkOTTableOS2_VA { } vA; struct
45 static_assert(sizeof(SkOTTableOS2::Version::VA) == 68, "sizeof_SkOTTableOS2__VA_not_68");
/third_party/skia/src/sfnt/
DSkOTTable_OS_2.h31 struct VA : SkOTTableOS2_VA { } vA; struct
45 static_assert(sizeof(SkOTTableOS2::Version::VA) == 68, "sizeof_SkOTTableOS2__VA_not_68");
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/
DXCoreISelLowering.cpp1068 const CCValAssign &VA = RVLocs[i]; in LowerCallResult() local
1069 if (VA.isRegLoc()) { in LowerCallResult()
1070 Chain = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), VA.getValVT(), in LowerCallResult()
1075 assert(VA.isMemLoc()); in LowerCallResult()
1076 ResultMemLocs.push_back(std::make_pair(VA.getLocMemOffset(), in LowerCallResult()
1143 CCValAssign &VA = ArgLocs[i]; in LowerCCCCallTo() local
1147 switch (VA.getLocInfo()) { in LowerCCCCallTo()
1151 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
1154 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
1157 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
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/third_party/mksh/
Dshf.c802 #define VA(type) va_arg(args, type) in shf_vfprintf() macro
851 tmp = VA(int); in shf_vfprintf()
914 lnum = (long)VA(ssize_t); in shf_vfprintf()
916 lnum = VA(long); in shf_vfprintf()
918 lnum = (long)(short)VA(int); in shf_vfprintf()
920 lnum = (long)VA(int); in shf_vfprintf()
927 lnum = VA(size_t); in shf_vfprintf()
929 lnum = VA(unsigned long); in shf_vfprintf()
931 lnum = (unsigned long)(unsigned short)VA(int); in shf_vfprintf()
933 lnum = (unsigned long)VA(unsigned int); in shf_vfprintf()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/
DAVRISelLowering.cpp1066 for (CCValAssign &VA : ArgLocs) { in LowerFormalArguments()
1069 if (VA.isRegLoc()) { in LowerFormalArguments()
1070 EVT RegVT = VA.getLocVT(); in LowerFormalArguments()
1080 unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC); in LowerFormalArguments()
1089 switch (VA.getLocInfo()) { in LowerFormalArguments()
1095 ArgValue = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
1099 DAG.getValueType(VA.getValVT())); in LowerFormalArguments()
1100 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
1104 DAG.getValueType(VA.getValVT())); in LowerFormalArguments()
1105 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/
DCallLowering.h135 CCValAssign &VA) = 0;
142 CCValAssign &VA) = 0;
155 Register extendRegister(Register ValReg, CCValAssign &VA);

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