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Searched refs:VARYING_BIT_TESS_LEVEL_OUTER (Results 1 – 8 of 8) sorted by relevance

/third_party/mesa3d/src/mesa/drivers/dri/i965/
Dbrw_tes.c147 ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER); in brw_tes_populate_key()
206 ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER); in brw_tes_populate_default_key()
Dbrw_link.cpp177 ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER); in unify_interfaces()
179 ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER); in unify_interfaces()
/third_party/mesa3d/src/intel/compiler/
Dbrw_vue_map.c227 vertex_slots &= ~(VARYING_BIT_TESS_LEVEL_OUTER | in brw_compute_tess_vue_map()
Dbrw_nir.c1492 ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER); in brw_nir_create_passthrough_tcs()
/third_party/mesa3d/src/compiler/
Dshader_enums.h458 #define VARYING_BIT_TESS_LEVEL_OUTER BITFIELD64_BIT(VARYING_SLOT_TESS_LEVEL_OUTER) macro
/third_party/mesa3d/src/mesa/state_tracker/
Dst_glsl_to_nir.cpp892 ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER); in st_link_nir()
894 ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER); in st_link_nir()
/third_party/mesa3d/src/intel/vulkan/
Danv_pipeline.c1681 ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER); in anv_pipeline_compile_graphics()
1683 ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER); in anv_pipeline_compile_graphics()
/third_party/mesa3d/src/amd/vulkan/
Dradv_pipeline.c3065 (VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER)); in gather_tess_info()