Searched refs:address32_hi (Results 1 – 19 of 19) sorted by relevance
| /third_party/mesa3d/src/amd/vulkan/ |
| D | si_cmd_buffer.c | 83 S_00B834_DATA(device->physical_device->rad_info.address32_hi >> 8)); in si_emit_compute()
298 S_00B524_MEM_BASE(device->physical_device->rad_info.address32_hi >> 8)); in si_emit_graphics()
300 S_00B324_MEM_BASE(device->physical_device->rad_info.address32_hi >> 8)); in si_emit_graphics()
303 S_00B414_MEM_BASE(device->physical_device->rad_info.address32_hi >> 8)); in si_emit_graphics()
305 S_00B214_MEM_BASE(device->physical_device->rad_info.address32_hi >> 8)); in si_emit_graphics()
308 S_00B524_MEM_BASE(device->physical_device->rad_info.address32_hi >> 8)); in si_emit_graphics()
310 S_00B324_MEM_BASE(device->physical_device->rad_info.address32_hi >> 8)); in si_emit_graphics()
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| D | radv_shader.c | 271 nir_ssa_def *comp[] = {ptr, nir_imm_int(b, pdev->rad_info.address32_hi)}; in convert_pointer_to_64()
1761 options->address32_hi = device->physical_device->rad_info.address32_hi;
1950 options.address32_hi = device->physical_device->rad_info.address32_hi;
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| D | radv_shader.h | 128 uint32_t address32_hi; member
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| D | radv_nir_to_llvm.c | 100 if (options->address32_hi) { in create_llvm_function()
102 options->address32_hi); in create_llvm_function()
409 LLVMConstInt(ctx->ac.i32, ctx->args->options->address32_hi, false)}; in get_desc_ptr()
464 LLVMConstInt(ctx->ac.i32, S_008F04_BASE_ADDRESS_HI(ctx->args->options->address32_hi), in radv_load_ubo()
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| D | radv_private.h | 1629 assert(va == 0 || (va >> 32) == device->physical_device->rad_info.address32_hi); in radv_emit_shader_pointer_body()
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| /third_party/mesa3d/src/amd/vulkan/winsys/null/ |
| D | radv_null_winsys.c | 143 info->address32_hi = info->chip_class >= GFX9 ? 0xffff8000u : 0x0; in radv_null_winsys_query_info()
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| /third_party/mesa3d/src/amd/common/ |
| D | ac_gpu_info.h | 108 uint32_t address32_hi; member
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| D | ac_gpu_info.c | 476 r = amdgpu_query_sw_info(dev, amdgpu_sw_info_address32_hi, &info->address32_hi); in ac_query_gpu_info()
1188 fprintf(f, " address32_hi = %u\n", info->address32_hi); in ac_print_gpu_info()
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| /third_party/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_buffer.c | 190 assert((start >> 32) == sscreen->info.address32_hi); in si_alloc_resource()
191 assert((last >> 32) == sscreen->info.address32_hi); in si_alloc_resource()
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| D | si_build_pm4.h | 273 assert((va) == 0 || ((va) >> 32) == sscreen->info.address32_hi); \
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| D | si_shader_llvm_resources.c | 70 desc1 = LLVMConstInt(ctx->ac.i32, S_008F04_BASE_ADDRESS_HI(ctx->screen->info.address32_hi), 0); in load_const_buffer_desc_fast_path()
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| D | si_shader_llvm.c | 186 if (ctx->screen->info.address32_hi) { in si_llvm_create_func()
188 ctx->screen->info.address32_hi); in si_llvm_create_func()
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| D | si_state_shaders.c | 581 S_00B424_MEM_BASE(sscreen->info.address32_hi >> 8)); in si_shader_hs()
656 S_00B324_MEM_BASE(sscreen->info.address32_hi >> 8)); in si_shader_es()
967 S_00B224_MEM_BASE(sscreen->info.address32_hi >> 8)); in si_shader_gs()
1511 S_00B124_MEM_BASE(sscreen->info.address32_hi >> 8)); in si_shader_vs()
1731 S_00B024_MEM_BASE(sscreen->info.address32_hi >> 8)); in si_shader_ps()
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| D | si_state.c | 5449 S_00B524_MEM_BASE(sscreen->info.address32_hi >> 8)); in si_init_cs_preamble_state()
5451 S_00B324_MEM_BASE(sscreen->info.address32_hi >> 8)); in si_init_cs_preamble_state()
5454 S_00B414_MEM_BASE(sscreen->info.address32_hi >> 8)); in si_init_cs_preamble_state()
5456 S_00B214_MEM_BASE(sscreen->info.address32_hi >> 8)); in si_init_cs_preamble_state()
5459 S_00B524_MEM_BASE(sscreen->info.address32_hi >> 8)); in si_init_cs_preamble_state()
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| D | si_compute.c | 371 S_00B834_DATA(sctx->screen->info.address32_hi >> 8)); in si_emit_initial_compute_regs()
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| D | si_shader_llvm_tess.c | 369 desc[1] = LLVMConstInt(ctx->ac.i32, S_008F04_BASE_ADDRESS_HI(ctx->screen->info.address32_hi), 0); in get_tess_ring_descriptor()
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| D | si_descriptors.c | 174 assert((desc->buffer->gpu_address >> 32) == sctx->screen->info.address32_hi); in si_upload_descriptors()
175 assert((desc->gpu_address >> 32) == sctx->screen->info.address32_hi); in si_upload_descriptors()
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| D | si_pipe.c | 1042 sscreen->info.address32_hi); in si_disk_cache_create()
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| /third_party/mesa3d/src/amd/compiler/ |
| D | aco_instruction_selection.cpp | 791 Operand::c32((unsigned)ctx->options->address32_hi)); in convert_pointer_to_64_bit()
5501 Operand::c32(S_008F04_BASE_ADDRESS_HI(ctx->options->address32_hi)), in visit_load_ubo()
11980 Operand::c32((unsigned)args->options->address32_hi)); in select_vs_prolog()
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