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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64SystemOperands.td124 def : DC<"CVAP", 0b011, 0b0111, 0b1100, 0b001>;
135 def : DC<"CGVAP", 0b011, 0b0111, 0b1100, 0b011>;
144 def : DC<"CGDVAP", 0b011, 0b0111, 0b1100, 0b101>;
559 def : ROSysReg<"PMCEID0_EL0", 0b11, 0b011, 0b1001, 0b1100, 0b110>;
560 def : ROSysReg<"PMCEID1_EL0", 0b11, 0b011, 0b1001, 0b1100, 0b111>;
608 def : ROSysReg<"RVBAR_EL1", 0b11, 0b000, 0b1100, 0b0000, 0b001>;
609 def : ROSysReg<"RVBAR_EL2", 0b11, 0b100, 0b1100, 0b0000, 0b001>;
610 def : ROSysReg<"RVBAR_EL3", 0b11, 0b110, 0b1100, 0b0000, 0b001>;
611 def : ROSysReg<"ISR_EL1", 0b11, 0b000, 0b1100, 0b0001, 0b000>;
630 def : ROSysReg<"TRCIDR4", 0b10, 0b001, 0b0000, 0b1100, 0b111>;
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DAArch64SVEInstrInfo.td204 defm FDIVR_ZPmZ : sve_fp_2op_p_zds<0b1100, "fdivr", int_aarch64_sve_fdivr>;
324 defm ORRS_PPzPP : sve_int_pred_log<0b1100, "orrs", null_frag>;
354 defm LD1SB_D_IMM : sve_mem_cld_si<0b1100, "ld1sb", Z_d, ZPR64>;
400 defm LD1SB_D : sve_mem_cld_ss<0b1100, "ld1sb", Z_d, ZPR64, GPR64NoXZRshifted8>;
418 defm LDNF1SB_D_IMM : sve_mem_cldnf_si<0b1100, "ldnf1sb", Z_d, ZPR64>;
436 defm LDFF1SB_D : sve_mem_cldff_ss<0b1100, "ldff1sb", Z_d, ZPR64, GPR64shifted8>;
1253 defm SQDMULH_ZZZI : sve2_int_mul_by_indexed_elem<0b1100, "sqdmulh">;
1296 defm SMLSLB_ZZZI : sve2_int_mla_long_by_indexed_elem<0b1100, "smlslb">;
1381 defm SRSHR_ZPmI : sve_int_bin_pred_shift_imm_right<0b1100, "srshr">;
1638 defm BEXT_ZZZ : sve2_misc_bitwise<0b1100, "bext">;
DAArch64InstrInfo.td756 defm FMLSL2lane : SIMDThreeSameVectorFMLIndex<1, 0b1100, "fmlsl2", int_aarch64_neon_fmlsl2>;
891 def PACGA : SignAuthTwoOperand<0b1100, "pacga", null_frag>;
3422 defm FRINTA : SingleOperandFPData<0b1100, "frinta", fround>;
4494 defm SMULL : SIMDLongThreeVectorBHS<0, 0b1100, "smull", int_aarch64_neon_smull>;
4515 defm UMULL : SIMDLongThreeVectorBHS<1, 0b1100, "umull", int_aarch64_neon_umull>;
5620 defm SQDMULH : SIMDIndexedHS<0, 0b1100, "sqdmulh", int_aarch64_neon_sqdmulh>;
DSVEInstrFormats.td677 let Inst{15-12} = 0b1100;
1043 let Inst{21-18} = 0b1100;
/third_party/mesa3d/src/panfrost/midgard/
Dmidgard_derivatives.c134 bool upper = ins->mask & 0b1100; in midgard_lower_derivatives()
147 dup.mask &= 0b1100; in midgard_lower_derivatives()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsMSAInstrFormats.td227 let Inst{21-18} = 0b1100;
279 let Inst{21-18} = 0b1100;
331 let Inst{21-18} = 0b1100;
DMipsMSAInstrInfo.td731 class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>;
732 class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>;
761 class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>;
762 class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>;
952 class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>;
953 class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>;
/third_party/mindspore/mindspore/ccsrc/ps/
Dps_context.h52 … {0b1100, ResetterRound::kPushMetrics},
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMInstrVFP.td821 def SH : AHuInp<0b11101, 0b11, 0b1100, 0b11, 0,
829 def UH : AHuInp<0b11101, 0b11, 0b1100, 0b01, 0,
837 def SS : ASuInp<0b11101, 0b11, 0b1100, 0b11, 0,
845 def US : ASuInp<0b11101, 0b11, 0b1100, 0b01, 0,
853 def SD : ASuInp<0b11101, 0b11, 0b1100, 0b11, 0,
868 def UD : ASuInp<0b11101, 0b11, 0b1100, 0b01, 0,
1554 def VTOUIZD : AVConv1IsD_Encode<0b11101, 0b11, 0b1100, 0b1011,
1570 def VTOUIZS : AVConv1InsS_Encode<0b11101, 0b11, 0b1100, 0b1010,
1589 def VTOUIZH : AVConv1IsH_Encode<0b11101, 0b11, 0b1100, 0b1001,
1628 def VTOUIRD : AVConv1IsD_Encode<0b11101, 0b11, 0b1100, 0b1011,
[all …]
DARMInstrNEON.td1370 : NLdSt<1, 0b10, 0b1100, op7_4, (outs VecListOneDAllLanes:$Vd),
1394 : NLdSt<1, 0b10, 0b1100, op7_4, (outs VecListDPairAllLanes:$Vd),
1419 def _fixed : NLdSt<1, 0b10, 0b1100, op7_4,
1428 def _register : NLdSt<1, 0b10, 0b1100, op7_4,
1438 def _fixed : NLdSt<1, 0b10, 0b1100, op7_4,
1447 def _register : NLdSt<1, 0b10, 0b1100, op7_4,
4386 defm VQDMULHsl: N3VIntSL_HS<0b1100, IIC_VMULi16D, IIC_VMULi32D,
4435 defm VMULLs : N3VL_QHS<0,1,0b1100,0, IIC_VMULi16D, IIC_VMULi32D,
4437 defm VMULLu : N3VL_QHS<1,1,0b1100,0, IIC_VMULi16D, IIC_VMULi32D,
4597 defm VQRDMLSH : N3VInt3_HS<1, 0, 0b1100, 1, IIC_VMACi16D, IIC_VMACi32D,
[all …]
DARMInstrThumb2.td1839 let Inst{11-8} = 0b1100;
3102 def t2SMLALD : T2DualHalfMulAddLong<0b100, 0b1100, "smlald">;
3104 def t2SMLSLD : T2DualHalfMulAddLong<0b101, 0b1100, "smlsld">;
3534 def t2LDAEXB : T2I_ldrex<0b1100, (outs rGPR:$Rt), (ins addr_offset_none:$addr),
3615 def t2STLEXB : T2I_strex<0b1100, (outs rGPR:$Rd),
4411 let Inst{27-24} = 0b1100;
DARMInstrThumb.td1245 T1sItDPEncode<0b1100, (outs tGPR:$Rdn), (ins tGPR:$Rn, tGPR:$Rm),
DARMInstrInfo.td3958 defm ORR : AsI1_bin_irs<0b1100, "orr",
5475 : ABI<0b1100, oops, iops, NoItinerary, opc, "\t$cop, $opc1, $Rt, $Rt2, $CRm",
5505 : ABXI<0b1100, oops, iops, NoItinerary,
/third_party/flutter/skia/third_party/externals/wuffs/std/crc32/
DREADME.md74 is to visit the bits right-to-left: `N=4, LSB, BITS=0b1100`. This is the
75 "reversed" or Least Significant Bit first order. The binary number `0b1100` in
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/
DSparcInstrAliases.td276 defm : int_cond_alias<"gu", 0b1100>;
305 defm : fp_cond_alias<"uge", 0b1100>;
328 defm : cp_cond_alias<"023", 0b1100>;
/third_party/flutter/skia/third_party/externals/wuffs/std/deflate/
DREADME.md387 0b1100 13
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/
DLanaiInstrFormats.td157 let Opcode = 0b1100;
/third_party/vk-gl-cts/external/vulkancts/modules/vulkan/conditional_rendering/
DvktConditionalDrawAndClearTests.cpp139 b1100 = 0xC, enumerator
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/
DMSP430InstrInfo.td546 defm BIC : Arith<0b1100, "bic", bic, 0, []>;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonDepInstrInfo.td9657 let Inst{24-21} = 0b1100;
9763 let Inst{24-21} = 0b1100;
13383 let Inst{13-10} = 0b1100;
17629 let Inst{24-21} = 0b1100;
21302 let Inst{24-21} = 0b1100;