/third_party/mindspore/mindspore/ccsrc/backend/kernel_compiler/gpu/cuda_impl/ |
D | util.cuh | 205 unsigned int *base_address = (unsigned int *)((size_t)address & ~3); in MsAtomicSub() local 209 old = *base_address; in MsAtomicSub() 217 old = atomicCAS(base_address, assumed, new_value); in MsAtomicSub() 236 unsigned int *base_address = (unsigned int *)((size_t)address & ~3); in MsAtomicMax() local 240 old = *base_address; in MsAtomicMax() 248 old = atomicCAS(base_address, assumed, new_value); in MsAtomicMax() 254 unsigned int *base_address = (unsigned int *)((size_t)address & ~3); in MsAtomicMax() local 258 old = *base_address; in MsAtomicMax() 266 old = atomicCAS(base_address, assumed, new_value); in MsAtomicMax() 316 unsigned int *base_address = (unsigned int *)((size_t)address & ~3); in MsAtomicMin() local [all …]
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/third_party/mesa3d/src/amd/common/ |
D | ac_rgp_elf_object_pack.c | 199 uint64_t base_address = -1; in get_lowest_shader() local 211 if (base_address > record->shader_data[i].base_address) { in get_lowest_shader() 213 base_address = record->shader_data[i].base_address; in get_lowest_shader() 238 uint32_t code_offset = rgp_shader_data->base_address - in ac_rgp_file_write_elf_text() 239 prev_rgp_shader_data->base_address; in ac_rgp_file_write_elf_text()
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D | ac_sqtt.c | 128 uint64_t base_address) in ac_sqtt_add_code_object_loader_event() argument 139 record->base_address = base_address & 0xffffffffffff; in ac_sqtt_add_code_object_loader_event()
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D | ac_rgp.h | 57 uint64_t base_address; member 86 uint64_t base_address; member
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D | ac_sqtt.h | 494 uint64_t base_address);
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D | ac_rgp.c | 647 uint64_t base_address; member
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/third_party/boost/libs/log/src/windows/ |
D | mapped_shared_memory.hpp | 45 void* base_address; member
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/third_party/mesa3d/src/intel/common/ |
D | intel_decoder.h | 236 uint64_t base_address);
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D | intel_batch_decoder.c | 114 uint64_t base_address, in update_count() argument 121 size = ctx->get_state_size(ctx->user_data, address, base_address); in update_count()
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/third_party/mesa3d/src/gallium/drivers/radeonsi/ |
D | si_sqtt.c | 1014 record->shader_data[gl_shader_stage].base_address = va & 0xffffffffffff; in si_sqtt_add_code_object() 1034 si_sqtt_register_pipeline(struct si_context* sctx, uint64_t pipeline_hash, uint64_t base_address, b… in si_sqtt_register_pipeline() argument 1044 result = ac_sqtt_add_code_object_loader_event(thread_trace_data, pipeline_hash, base_address); in si_sqtt_register_pipeline()
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D | si_compute.c | 316 uint64_t base_address = program->shader.bo->gpu_address; in si_bind_compute_state() local 320 si_sqtt_register_pipeline(sctx, pipeline_code_hash, base_address, true); in si_bind_compute_state()
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D | si_state_draw.cpp | 285 uint64_t base_address = ~0; in si_update_shaders() local 294 base_address = MIN2(base_address, in si_update_shaders() 301 si_sqtt_register_pipeline(sctx, pipeline_code_hash, base_address, false); in si_update_shaders()
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D | si_pipe.h | 1556 …er_pipeline(struct si_context* sctx, uint64_t pipeline_hash, uint64_t base_address, bool is_comput…
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/third_party/mesa3d/src/gallium/drivers/crocus/ |
D | crocus_batch.c | 149 uint64_t base_address) in decode_get_state_size() argument 162 _mesa_hash_table_u64_search(batch->state_sizes, address - base_address); in decode_get_state_size()
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/third_party/mesa3d/src/mesa/drivers/dri/i965/ |
D | brw_batch.c | 115 decode_get_state_size(void *v_brw, uint64_t address, uint64_t base_address) in decode_get_state_size() argument 121 address - base_address); in decode_get_state_size()
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/third_party/mesa3d/src/gallium/drivers/iris/ |
D | iris_batch.c | 152 UNUSED uint64_t base_address) in decode_get_state_size() argument
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/third_party/mesa3d/src/intel/vulkan/ |
D | anv_allocator.c | 834 uint64_t base_address, in anv_state_pool_init() argument 842 base_address + start_offset, in anv_state_pool_init()
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D | anv_private.h | 729 uint64_t base_address,
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D | genX_cmd_buffer.c | 507 uint64_t base_address = in anv_image_init_aux_tt() local 568 uint64_t address = base_address + offset; in anv_image_init_aux_tt()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/BinaryFormat/ |
D | Dwarf.def | 831 HANDLE_DW_RLE(0x05, base_address) 842 HANDLE_DW_LLE(0x06, base_address)
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/third_party/mesa3d/src/amd/vulkan/layers/ |
D | radv_sqtt_layer.c | 888 record->shader_data[i].base_address = va & 0xffffffffffff; in radv_add_code_object()
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/third_party/boost/boost/interprocess/detail/ |
D | win32_api.hpp | 130 void * base_address; member
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