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Searched refs:comp_mask (Results 1 – 25 of 30) sorted by relevance

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/third_party/mesa3d/src/gallium/drivers/r600/sb/
Dsb_shader.cpp62 void shader::add_pinned_gpr_values(vvec& vec, unsigned gpr, unsigned comp_mask, in add_pinned_gpr_values() argument
65 while (comp_mask) { in add_pinned_gpr_values()
66 if (comp_mask & 1) { in add_pinned_gpr_values()
80 comp_mask >>= 1; in add_pinned_gpr_values()
197 void shader::add_input(unsigned gpr, bool preloaded, unsigned comp_mask) { in add_input() argument
203 i.comp_mask = comp_mask; in add_input()
206 add_pinned_gpr_values(root->dst, gpr, comp_mask, true); in add_input()
224 add_pinned_gpr_values(cf->dst, gpr, I->comp_mask, false); in init_call_fs()
226 add_pinned_gpr_values(cf->src, gpr, I->comp_mask, true); in init_call_fs()
392 unsigned comp_mask) { in add_gpr_array() argument
[all …]
Dsb_shader.h40 unsigned comp_mask; member
331 void add_pinned_gpr_values(vvec& vec, unsigned gpr, unsigned comp_mask, bool src);
336 unsigned comp_mask);
344 unsigned comp_mask = 0xF);
Dsb_bc_parser.cpp135 sh->add_gpr_array(a.gpr_start, a.gpr_count, a.comp_mask); in parse_decls()
147 sh->add_gpr_array(a.gpr_start, a.gpr_count, a.comp_mask); in parse_decls()
851 if (c->bc.comp_mask & (1 << s)) in prepare_ir()
860 if (c->bc.comp_mask & (1 << s)) in prepare_ir()
Dsb_bc_builder.cpp345 .COMP_MASK(bc.comp_mask) in build_cf_mem()
356 .COMP_MASK(bc.comp_mask) in build_cf_mem()
367 .COMP_MASK(bc.comp_mask) in build_cf_mem()
Dsb_bc_decoder.cpp264 bc.comp_mask = w1.get_COMP_MASK(); in decode_cf_mem()
273 bc.comp_mask = w1.get_COMP_MASK(); in decode_cf_mem()
283 bc.comp_mask = w1.get_COMP_MASK(); in decode_cf_mem()
Dsb_bc_dump.cpp149 s << ((n.bc.comp_mask & (1 << k)) ? chans[k] : '_'); in dump()
/third_party/mesa3d/src/compiler/nir/
Dnir_gather_xfb_info.c137 uint8_t comp_mask = ((1 << comp_slots) - 1) << var->data.location_frac; in add_var_xfb_outputs() local
144 while (comp_mask) { in add_var_xfb_outputs()
150 output->component_mask = comp_mask & 0xf; in add_var_xfb_outputs()
155 comp_mask >>= 4; in add_var_xfb_outputs()
/third_party/mesa3d/src/panfrost/midgard/
Dmidgard_print.c122 unsigned comp_mask = effective_writemask(ins->op, ins->mask); in mir_print_embedded_constant() local
123 unsigned num_comp = util_bitcount(comp_mask); in mir_print_embedded_constant()
133 if (!(comp_mask & (1 << comp))) in mir_print_embedded_constant()
Ddisassemble.c558 unsigned comp_mask, num_comp = 0; in print_vector_constants() local
563 comp_mask = effective_writemask(alu->op, condense_writemask(alu->mask, bits)); in print_vector_constants()
564 num_comp = util_bitcount(comp_mask); in print_vector_constants()
570 if (!(comp_mask & (1 << i))) continue; in print_vector_constants()
854 unsigned comp_mask = condense_writemask(mask, bits_for_mode(mode)); in print_vector_field() local
855 unsigned num_comp = util_bitcount(comp_mask); in print_vector_field()
Dmidgard_schedule.c402 unsigned comp_mask = mir_from_bytemask(mir_round_bytemask_up( in mir_adjust_constant() local
418 if (!(comp_mask & (1 << comp))) in mir_adjust_constant()
/third_party/mesa3d/src/gallium/drivers/r600/sfn/
Dsfn_instruction_gds.cpp90 int burst_count, int comp_mask, int element_size, bool ack): in RatInstruction() argument
99 m_comp_mask(comp_mask), in RatInstruction()
Dsfn_instruction_export.h117 int array_base, int comp_mask, int out_buffer,
123 int comp_mask() const { return m_writemask;} in comp_mask() function
Dsfn_instruction_gds.h153 int burst_count, int comp_mask, int element_size,
165 int comp_mask() const {return m_comp_mask;} in comp_mask() function
Dsfn_instruction_export.cpp196 int array_base, int comp_mask, int out_buffer, in StreamOutIntruction() argument
203 m_writemask(comp_mask), in StreamOutIntruction()
Dsfn_ir_to_assembly.cpp595 output.comp_mask = so_instr.comp_mask(); in visit()
617 output.comp_mask = 0xf; in visit()
818 cf.comp_mask = instr.write_mask(); in visit()
1057 cf->output.comp_mask = instr.comp_mask(); in visit()
Dsfn_value_gpr.h126 GPRArray(int base, int size, int comp_mask, int frac);
/third_party/ffmpeg/libavfilter/
Ddrawutils.h40 uint8_t comp_mask[MAX_PLANES]; /*< bitmask of used non-alpha components */ member
Ddrawutils.c132 draw->comp_mask[desc->comp[i].plane] |= in ff_draw_init()
298 return (draw->comp_mask[plane] >> comp) & 1; in component_used()
/third_party/mesa3d/src/gallium/drivers/r600/
Deg_asm.c114 S_SQ_CF_ALLOC_EXPORT_WORD1_BUF_COMP_MASK(cf->output.comp_mask) | in eg_bytecode_cf_build()
132 S_SQ_CF_ALLOC_EXPORT_WORD1_BUF_COMP_MASK(cf->output.comp_mask) | in eg_bytecode_cf_build()
173 output->comp_mask = G_SQ_CF_ALLOC_EXPORT_WORD1_BUF_COMP_MASK(word1);
Dr600_shader.h166 unsigned comp_mask; member
Dr600_dump.c146 PRINT_UINT_ARRAY_ELM(arrays, comp_mask); in print_shader_info()
Dr600_asm.h160 unsigned comp_mask; member
Dr600_asm.c204 output->comp_mask == bc->cf_last->output.comp_mask && in r600_bytecode_add_output()
1732 S_SQ_CF_ALLOC_EXPORT_WORD1_BUF_COMP_MASK(cf->output.comp_mask); in r600_bytecode_cf_build()
2222 if (cf->output.comp_mask & (1 << i)) in r600_bytecode_disasm()
2869 output->comp_mask = G_SQ_CF_ALLOC_EXPORT_WORD1_BUF_COMP_MASK(word1);
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DR600InstrFormats.td488 bits<4> comp_mask;
497 let Word1{15-12} = comp_mask;
/third_party/mesa3d/docs/relnotes/
D9.1.1.rst206 - r600g: Check comp_mask before merging export instructions

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