| /third_party/mindspore/tests/st/ops/gpu/ |
| D | test_select_op.py | 29 def construct(self, cond_op, input_x, input_y): argument
30 return self.select(cond_op, input_x, input_y)
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| /third_party/mindspore/tests/st/ops/cpu/ |
| D | test_select_op.py | 30 def construct(self, cond_op, input_x, input_y): argument
31 return self.select(cond_op, input_x, input_y)
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| /third_party/mesa3d/src/compiler/nir/ |
| D | nir_loop_analyze.c | 717 get_iteration(nir_op cond_op, nir_const_value initial, nir_const_value step, in get_iteration() argument
723 switch (cond_op) { in get_iteration()
765 nir_op cond_op, unsigned bit_size, in will_break_on_first_iteration() argument
795 nir_eval_const_opcode(cond_op, &result, 1, bit_size, src, execution_mode); in will_break_on_first_iteration()
802 nir_const_value limit, nir_op cond_op, unsigned bit_size, in test_iterations() argument
807 assert(nir_op_infos[cond_op].num_inputs == 2); in test_iterations()
844 nir_eval_const_opcode(cond_op, &result, 1, bit_size, src, execution_mode); in test_iterations()
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| /third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Tools/source/val/ |
| D | validate_cfg.cpp | 166 const auto cond_op = _.FindDef(cond_id); in ValidateBranchConditional() local
167 if (!cond_op || !cond_op->type_id() || in ValidateBranchConditional()
168 !_.IsBoolScalarType(cond_op->type_id())) { in ValidateBranchConditional()
|
| /third_party/skia/third_party/externals/spirv-tools/source/val/ |
| D | validate_cfg.cpp | 166 const auto cond_op = _.FindDef(cond_id); in ValidateBranchConditional() local
167 if (!cond_op || !cond_op->type_id() || in ValidateBranchConditional()
168 !_.IsBoolScalarType(cond_op->type_id())) { in ValidateBranchConditional()
|
| /third_party/spirv-tools/source/val/ |
| D | validate_cfg.cpp | 166 const auto cond_op = _.FindDef(cond_id); in ValidateBranchConditional() local
167 if (!cond_op || !cond_op->type_id() || in ValidateBranchConditional()
168 !_.IsBoolScalarType(cond_op->type_id())) { in ValidateBranchConditional()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | Mips64InstrInfo.td | 470 class SetCC64_R<string opstr, PatFrag cond_op> :
473 [(set GPR64Opnd:$rd, (zext (cond_op GPR64Opnd:$rs,
479 class SetCC64_I<string opstr, PatFrag cond_op>:
482 [(set GPR64Opnd:$rt, (zext (cond_op GPR64Opnd:$rs,
488 class CBranchBitNum<string opstr, DAGOperand opnd, PatFrag cond_op,
492 [(brcond (i32 (cond_op (and RO:$rs, (shl shift, immZExt5_64:$p)), 0)),
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| D | MipsInstrInfo.td | 1469 class CBranch<string opstr, DAGOperand opnd, PatFrag cond_op,
1473 [(brcond (i32 (cond_op RO:$rs, RO:$rt)), bb:$offset)], II_BCC,
1492 class CBranchZero<string opstr, DAGOperand opnd, PatFrag cond_op,
1496 [(brcond (i32 (cond_op RO:$rs, 0)), bb:$offset)], II_BCCZ,
1516 class SetCC_R<string opstr, PatFrag cond_op, RegisterOperand RO> :
1519 [(set GPR32Opnd:$rd, (cond_op RO:$rs, RO:$rt))],
1522 class SetCC_I<string opstr, PatFrag cond_op, Operand Od, PatLeaf imm_type,
1526 [(set GPR32Opnd:$rt, (cond_op RO:$rs, imm_type:$imm16))],
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| D | Mips16InstrInfo.td | 1392 class SetCC_R16<PatFrag cond_op, Instruction I>:
1393 Mips16Pat<(cond_op CPU16Regs:$rx, CPU16Regs:$ry),
1396 class SetCC_I16<PatFrag cond_op, PatLeaf imm_type, Instruction I>:
1397 Mips16Pat<(cond_op CPU16Regs:$rx, imm_type:$imm16),
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| D | MicroMipsInstrInfo.td | 198 class CompactBranchMM<string opstr, DAGOperand opnd, PatFrag cond_op,
|