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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/
DMSP430InstrFormats.td32 class MSP430Inst<dag outs, dag ins, int size, string asmstr> : Instruction {
38 dag OutOperandList = outs;
39 dag InOperandList = ins;
47 dag outs, dag ins, string asmstr, list<dag> pattern>
64 dag outs, dag ins, string asmstr, list<dag> pattern>
68 dag outs, dag ins, string asmstr, list<dag> pattern>
74 dag outs, dag ins, string asmstr, list<dag> pattern>
83 dag outs, dag ins, string asmstr, list<dag> pattern>
100 dag outs, dag ins, string asmstr, list<dag> pattern>
109 dag outs, dag ins, string asmstr, list<dag> pattern>
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/
DXCoreInstrFormats.td12 class InstXCore<int sz, dag outs, dag ins, string asmstr, list<dag> pattern>
17 dag OutOperandList = outs;
18 dag InOperandList = ins;
26 class PseudoInstXCore<dag outs, dag ins, string asmstr, list<dag> pattern>
35 class _F3R<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
44 class _F3RImm<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
49 class _FL3R<bits<9> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
60 class _FL3RSrcDst<bits<9> opc, dag outs, dag ins, string asmstr,
61 list<dag> pattern> : _FL3R<opc, outs, ins, asmstr, pattern> {
65 class _F2RUS<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCInstrFormats.td13 class I<bits<6> opcode, dag OOL, dag IOL, string asmstr, InstrItinClass itin>
73 class I2<bits<6> opcode1, bits<6> opcode2, dag OOL, dag IOL, string asmstr,
108 class IXFormMemOp<bits<6> opcode, dag OOL, dag IOL, string asmstr,
113 class IForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr,
114 InstrItinClass itin, list<dag> pattern>
125 class BForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr>
142 class BForm_1<bits<6> opcode, bits<5> bo, bit aa, bit lk, dag OOL, dag IOL,
151 dag OOL, dag IOL, string asmstr>
163 dag OOL, dag IOL, string asmstr>
177 dag OOL, dag IOL, string asmstr>
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/
DAVRInstrFormats.td14 class AVRInst<dag outs, dag ins, string asmstr, list<dag> pattern> : Instruction
18 dag OutOperandList = outs;
19 dag InOperandList = ins;
27 class AVRInst16<dag outs, dag ins, string asmstr, list<dag> pattern>
36 class AVRInst32<dag outs, dag ins, string asmstr, list<dag> pattern>
52 class Pseudo<dag outs, dag ins, string asmstr, list<dag> pattern>
69 class FRdRr<bits<4> opcode, bits<2> f, dag outs, dag ins, string asmstr,
70 list<dag> pattern> : AVRInst16<outs, ins, asmstr, pattern>
82 class FTST<bits<4> opcode, bits<2> f, dag outs, dag ins, string asmstr,
83 list<dag> pattern> : AVRInst16<outs, ins, asmstr, pattern>
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrFormats.td259 class X86Inst<bits<8> opcod, Format f, ImmType i, dag outs, dag ins,
269 dag OutOperandList = outs;
270 dag InOperandList = ins;
373 class PseudoI<dag oops, dag iops, list<dag> pattern>
378 class I<bits<8> o, Format f, dag outs, dag ins, string asm,
379 list<dag> pattern, Domain d = GenericDomain>
384 class Ii8<bits<8> o, Format f, dag outs, dag ins, string asm,
385 list<dag> pattern, Domain d = GenericDomain>
390 class Ii8Reg<bits<8> o, Format f, dag outs, dag ins, string asm,
391 list<dag> pattern, Domain d = GenericDomain>
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/
DSparcInstrFormats.td9 class InstSP<dag outs, dag ins, string asmstr, list<dag> pattern,
20 dag OutOperandList = outs;
21 dag InOperandList = ins;
36 class F2<dag outs, dag ins, string asmstr, list<dag> pattern,
48 class F2_1<bits<3> op2Val, dag outs, dag ins, string asmstr, list<dag> pattern,
58 class F2_2<bits<3> op2Val, bit annul, dag outs, dag ins, string asmstr,
59 list<dag> pattern, InstrItinClass itin = NoItinerary>
69 dag outs, dag ins, string asmstr, list<dag> pattern,
86 class F2_4<bits<3> cond, bit annul, bit pred, dag outs, dag ins,
87 string asmstr, list<dag> pattern, InstrItinClass itin = NoItinerary>
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMInstrFormats.td252 class vpred_ops<dag extra_op, dag extra_mi> : OperandWithDefaultOps<OtherVT,
355 class ARMInstAlias<string Asm, dag Result, bit EmitPriority = 0>
357 class ARMInstSubst<string Asm, dag Result, bit EmitPriority = 0>
360 class tInstAlias<string Asm, dag Result, bit EmitPriority = 0>
362 class tInstSubst<string Asm, dag Result, bit EmitPriority = 0>
365 class t2InstAlias<string Asm, dag Result, bit EmitPriority = 0>
367 class t2InstSubst<string Asm, dag Result, bit EmitPriority = 0>
370 class VFP2InstAlias<string Asm, dag Result, bit EmitPriority = 0>
372 class VFP2DPInstAlias<string Asm, dag Result, bit EmitPriority = 0>
374 class VFP3InstAlias<string Asm, dag Result, bit EmitPriority = 0>
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMips16InstrFormats.td35 class MipsInst16_Base<dag outs, dag ins, string asmstr, list<dag> pattern,
54 class MipsInst16<dag outs, dag ins, string asmstr, list<dag> pattern,
71 class MipsInst16_32<dag outs, dag ins, string asmstr, list<dag> pattern,
81 class MipsInst16_EXTEND<dag outs, dag ins, string asmstr, list<dag> pattern,
91 class MipsPseudo16<dag outs, dag ins, string asmstr, list<dag> pattern>:
102 class FI16<bits<5> op, dag outs, dag ins, string asmstr, list<dag> pattern,
117 class FRI16<bits<5> op, dag outs, dag ins, string asmstr,
118 list<dag> pattern, InstrItinClass itin>:
134 class FRR16<bits<5> _funct, dag outs, dag ins, string asmstr,
135 list<dag> pattern, InstrItinClass itin>:
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DMipsEVAInstrInfo.td55 dag OutOperandList = (outs GPROpnd:$rt);
56 dag InOperandList = (ins mem_simm9:$addr);
58 list<dag> Pattern = [];
75 dag OutOperandList = (outs);
76 dag InOperandList = (ins GPROpnd:$rt, mem_simm9:$addr);
78 list<dag> Pattern = [];
92 dag OutOperandList = (outs GPROpnd:$rt);
93 dag InOperandList = (ins mem_simm9:$addr, GPROpnd:$src);
95 list<dag> Pattern = [];
110 dag OutOperandList = (outs);
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DMips32r6InstrInfo.td213 dag OutOperandList = (outs FGRCCOpnd:$fd);
214 dag InOperandList = (ins FGROpnd:$fs, FGROpnd:$ft);
216 list<dag> Pattern = [(set FGRCCOpnd:$fd, (Op FGROpnd:$fs, FGROpnd:$ft))];
317 dag OutOperandList = (outs GPROpnd:$rs);
318 dag InOperandList = (ins ImmOpnd:$imm);
320 list<dag> Pattern = [];
331 dag OutOperandList = (outs GPROpnd:$rd);
332 dag InOperandList = (ins GPROpnd:$rs, GPROpnd:$rt, ImmOpnd:$bp);
334 list<dag> Pattern = [];
343 dag OutOperandList = (outs GPROpnd:$rs);
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DMicroMips32r6InstrInfo.td275 dag InOperandList = (ins GPROpnd:$rt, opnd:$offset);
276 dag OutOperandList = (outs);
323 dag InOperandList = (ins GPROpnd:$rs, GPROpnd:$rt, opnd:$offset);
324 dag OutOperandList = (outs);
354 dag InOperandList = (ins opnd:$offset);
355 dag OutOperandList = (outs);
366 list<dag> Pattern = [(br bb:$offset)];
397 dag OutOperandList = (outs GPROpnd:$rd);
398 dag InOperandList = (ins GPROpnd:$rt);
400 list<dag> Pattern = [];
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/third_party/mesa3d/src/util/
Ddag.c59 dag_remove_edge(struct dag *dag, struct dag_edge *edge) in dag_remove_edge() argument
67 list_addtail(&child->link, &dag->heads); in dag_remove_edge()
78 dag_prune_head(struct dag *dag, struct dag_node *node) in dag_prune_head() argument
85 dag_remove_edge(dag, edge); in dag_prune_head()
94 dag_init_node(struct dag *dag, struct dag_node *node) in dag_init_node() argument
96 util_dynarray_init(&node->edges, dag); in dag_init_node()
97 list_addtail(&node->link, &dag->heads); in dag_init_node()
165 dag_traverse_bottom_up(struct dag *dag, void (*cb)(struct dag_node *node, in dag_traverse_bottom_up() argument
173 list_for_each_entry(struct dag_node, node, &dag->heads, link) { in dag_traverse_bottom_up()
183 struct dag *
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Ddag.h49 struct dag { struct
53 struct dag *dag_create(void *mem_ctx); argument
54 void dag_init_node(struct dag *dag, struct dag_node *node);
56 void dag_remove_edge(struct dag *dag, struct dag_edge *edge);
57 void dag_traverse_bottom_up(struct dag *dag, void (*cb)(struct dag_node *node,
59 void dag_prune_head(struct dag *dag, struct dag_node *node);
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/VE/
DVEInstrFormats.td9 class InstVE<dag outs, dag ins, string asmstr, list<dag> pattern>
19 dag OutOperandList = outs;
20 dag InOperandList = ins;
28 class RM<bits<8>opVal, dag outs, dag ins, string asmstr, list<dag> pattern=[]>
47 class RR<bits<8>opVal, dag outs, dag ins, string asmstr>
59 class CF<bits<8>opVal, dag outs, dag ins, string asmstr, list<dag> pattern=[]>
71 class Pseudo<dag outs, dag ins, string asmstr, list<dag> pattern=[]>
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/
DARCInstrFormats.td96 class InstARC<int sz, dag outs, dag ins, string asmstr, list<dag> pattern>
100 dag OutOperandList = outs;
101 dag InOperandList = ins;
120 class PseudoInstARC<dag outs, dag ins, string asmstr, list<dag> pattern>
155 class F32_BR<bits<5> major, dag outs, dag ins, bit b16, string asmstr,
156 list<dag> pattern> :
165 class F32_BR_COND<bits<5> major, dag outs, dag ins, bit b16, string asmstr,
166 list<dag> pattern> :
175 class F32_BR_UCOND_FAR<bits<5> major, dag outs, dag ins, bit b16, string asmstr,
176 list<dag> pattern> :
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/third_party/mesa3d/src/gallium/drivers/vc4/
Dvc4_qpu_schedule.c47 struct dag_node dag; member
80 struct dag *dag; member
110 dag_add_edge(&before->dag, &after->dag, edge_data); in add_dep()
112 dag_add_edge(&after->dag, &before->dag, edge_data); in add_dep()
415 calculate_forward_deps(struct vc4_compile *c, struct dag *dag, in calculate_forward_deps() argument
421 state.dag = dag; in calculate_forward_deps()
429 calculate_reverse_deps(struct vc4_compile *c, struct dag *dag, in calculate_reverse_deps() argument
435 state.dag = dag; in calculate_reverse_deps()
445 struct dag *dag; member
569 list_for_each_entry(struct schedule_node, n, &scoreboard->dag->heads, in choose_instruction_to_schedule()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVInstrFormatsC.td13 class RVInst16<dag outs, dag ins, string opcodestr, string argstr,
14 list<dag> pattern, InstFormat format>
28 dag OutOperandList = outs;
29 dag InOperandList = ins;
36 class RVInst16CR<bits<4> funct4, bits<2> opcode, dag outs, dag ins,
51 class RVInst16CI<bits<3> funct3, bits<2> opcode, dag outs, dag ins,
67 class RVInst16CSS<bits<3> funct3, bits<2> opcode, dag outs, dag ins,
79 class RVInst16CIW<bits<3> funct3, bits<2> opcode, dag outs, dag ins,
93 class RVInst16CL<bits<3> funct3, bits<2> opcode, dag outs, dag ins,
108 class RVInst16CS<bits<3> funct3, bits<2> opcode, dag outs, dag ins,
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DRISCVInstrFormats.td79 class RVInst<dag outs, dag ins, string opcodestr, string argstr,
80 list<dag> pattern, InstFormat format>
96 dag OutOperandList = outs;
97 dag InOperandList = ins;
105 class Pseudo<dag outs, dag ins, list<dag> pattern, string opcodestr = "", string argstr = "">
145 class RVInstR<bits<7> funct7, bits<3> funct3, RISCVOpcode opcode, dag outs,
146 dag ins, string opcodestr, string argstr>
160 class RVInstR4<bits<2> funct2, RISCVOpcode opcode, dag outs, dag ins,
179 RISCVOpcode opcode, dag outs, dag ins, string opcodestr,
196 class RVInstRFrm<bits<7> funct7, RISCVOpcode opcode, dag outs, dag ins,
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/third_party/mesa3d/src/freedreno/ir3/
Dir3_postsched.c67 struct dag *dag; member
76 struct dag_node dag; /* must be first for util_dynarray_foreach */ member
87 list_for_each_entry (struct ir3_postsched_node, __n, __list, dag.link)
117 dag_prune_head(ctx->dag, &n->dag); in schedule()
145 foreach_sched_node (n, &ctx->dag->heads) { in dump_state()
148 util_dynarray_foreach (&n->dag.edges, struct dag_edge, edge) { in dump_state()
152 di(child->instr, " -> (%d parents) ", child->dag.parent_count); in dump_state()
186 foreach_sched_node (n, &ctx->dag->heads) { in choose_instr()
203 foreach_sched_node (n, &ctx->dag->heads) { in choose_instr()
217 foreach_sched_node (n, &ctx->dag->heads) { in choose_instr()
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/third_party/mesa3d/src/compiler/nir/
Dnir_schedule.c62 struct dag_node dag; /* must be first for our u_dynarray_foreach */ member
86 struct dag *dag; member
215 dag_add_edge(&before->dag, &after->dag, NULL); in add_dep()
217 dag_add_edge(&after->dag, &before->dag, NULL); in add_dep()
603 list_for_each_entry(nir_schedule_node, n, &scoreboard->dag->heads, dag.link) { in nir_schedule_choose_instruction_fallback()
621 list_for_each_entry(nir_schedule_node, n, &scoreboard->dag->heads, dag.link) { in nir_schedule_choose_instruction_fallback()
649 list_for_each_entry(nir_schedule_node, n, &scoreboard->dag->heads, dag.link) { in nir_schedule_choose_instruction_csp()
667 list_for_each_entry(nir_schedule_node, n, &scoreboard->dag->heads, dag.link) { in nir_schedule_choose_instruction_csp()
690 list_for_each_entry(nir_schedule_node, n, &scoreboard->dag->heads, dag.link) { in nir_schedule_choose_instruction_csr()
711 list_for_each_entry(nir_schedule_node, n, &scoreboard->dag->heads, dag.link) { in nir_schedule_choose_instruction_csr()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonInstrFormats.td48 class InstHexagon<dag outs, dag ins, string asmstr, list<dag> pattern,
53 dag OutOperandList = outs;
54 dag InOperandList = ins;
189 class HInst<dag outs, dag ins, string asmstr, InstrItinClass itin, IType type> :
197 class LDInst<dag outs, dag ins, string asmstr, list<dag> pattern = [],
201 class CONSTLDInst<dag outs, dag ins, string asmstr, list<dag> pattern = [],
206 class STInst<dag outs, dag ins, string asmstr, list<dag> pattern = [],
211 class Endloop<dag outs, dag ins, string asmstr, list<dag> pattern = [],
217 class Pseudo<dag outs, dag ins, string asmstr, list<dag> pattern = [],
223 class PseudoM<dag outs, dag ins, string asmstr, list<dag> pattern = [],
/third_party/skia/third_party/externals/swiftshader/third_party/marl/src/
Ddag_test.cpp50 auto dag = builder.build(); in TEST_P() local
51 dag->run(); in TEST_P()
65 auto dag = builder.build(); in TEST_P() local
68 dag->run(data); in TEST_P()
82 auto dag = builder.build(); in TEST_P() local
85 dag->run(dataA); in TEST_P()
86 dag->run(dataB); in TEST_P()
87 dag->run(dataA); in TEST_P()
104 auto dag = builder.build(); in TEST_P() local
107 dag->run(data); in TEST_P()
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/third_party/mesa3d/src/util/tests/
Ddag_test.cpp34 struct dag *dag; member in dag_test
42 dag = dag_create(mem_ctx); in dag_test()
69 init_nodes(struct dag *dag, struct node *nodes, unsigned num_nodes) in init_nodes() argument
72 dag_init_node(dag, static_cast<struct dag_node *>(&nodes[i])); in init_nodes()
80 init_nodes(dag, node, (num_nodes))
149 dag_traverse_bottom_up(dag, output_cb, &actual); in TEST_F()
173 dag_traverse_bottom_up(dag, output_cb, &actual); in TEST_F()
201 dag_traverse_bottom_up(dag, output_cb, &actual); in TEST_F()
227 dag_traverse_bottom_up(dag, output_cb, &actual); in TEST_F()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrFormats.td31 class NI<dag oops, dag iops, list<dag> pattern, string stack,
34 dag OutOperandList = oops;
35 dag InOperandList = iops;
53 multiclass I<dag oops_r, dag iops_r, dag oops_s, dag iops_s,
54 list<dag> pattern_r, string asmstr_r = "", string asmstr_s = "",
63 multiclass NRI<dag oops, dag iops, list<dag> pattern, string asmstr = "",
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/
DLanaiInstrFormats.td9 class InstLanai<dag outs, dag ins, string asmstr, list<dag> pattern>
21 dag OutOperandList = outs;
22 dag InOperandList = ins;
86 class InstRI<bits<3> op, dag outs, dag ins, string asmstr,
87 list<dag> pattern>
146 class InstRR<bits<3> op, dag outs, dag ins, string asmstr,
147 list<dag> pattern>
196 class InstRM<bit S, dag outs, dag ins, string asmstr, list<dag> pattern>
256 class InstRRM<bit S, dag outs, dag ins, string asmstr,
257 list<dag> pattern>
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