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Searched refs:frcp (Results 1 – 23 of 23) sorted by relevance

/third_party/mesa3d/src/panfrost/midgard/
Dmidgard_opt_perspective.c68 unsigned frcp = ins->src[1]; in midgard_opt_combine_projection() local
71 if (frcp & PAN_IS_REG) continue; in midgard_opt_combine_projection()
79 if (sub->dest != frcp) continue; in midgard_opt_combine_projection()
93 if (!mir_single_use(ctx, frcp)) continue; in midgard_opt_combine_projection()
Dmidgard_compile.c788 ALU_CASE(frcp, frcp); in emit_alu()
/third_party/mesa3d/src/gallium/drivers/etnaviv/
Detnaviv_compiler_nir_emit.c69 OP(ffract, FRC, X_X_0), OP(frcp, RCP, X_X_0), OP(frsq, RSQ, X_X_0),
/third_party/mesa3d/docs/relnotes/
D11.1.1.rst110 - nir: Add a lower_fdiv option, turn fdiv into fmul/frcp.
D20.1.0.rst614 - pan/bi: Add fp16 support for frcp/frsq
D21.1.0.rst470 - pan/bi: Lower frcp to Newton-Raphson
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsScheduleP5600.td470 // frcp.[wd], frsqrt.[wd]
DMipsScheduleGeneric.td1583 // fadd.[dw], fmadd.[dw], fmul.[dw], frcp.[dw], frsqrt.[dw], fsqrt.[dw]
DMipsMSAInstrInfo.td2134 class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128WOpnd>;
2135 class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128DOpnd>;
/third_party/mesa3d/src/asahi/compiler/
Dagx_compile.c561 UNOP(frcp, rcp); in agx_emit_alu()
/third_party/flutter/skia/third_party/externals/icu/source/data/misc/
Dmetadata.txt1646 frcp{
DsupplementalData.txt7694 "frcp",
20135 "frcp",
/third_party/skia/third_party/externals/icu/source/data/misc/
Dmetadata.txt2219 frcp{
DsupplementalData.txt7970 "frcp",
20950 "frcp",
/third_party/icu/icu4c/source/data/misc/
Dmetadata.txt2219 frcp{
DsupplementalData.txt7970 "frcp",
20950 "frcp",
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/
DMipsGenAsmMatcher.inc5013 "fmsub.d\007fmsub.w\006fmul.d\006fmul.w\004fork\006frcp.d\006frcp.w\007f"
6655 …{ 4637 /* frcp.d */, Mips::FRCP_D, Convert__MSA128AsmReg1_0__MSA128AsmReg1_1, AMFBS_HasStdEnc_HasM…
6656 …{ 4644 /* frcp.w */, Mips::FRCP_W, Convert__MSA128AsmReg1_0__MSA128AsmReg1_1, AMFBS_HasStdEnc_HasM…
9925 { 4637 /* frcp.d */, 3 /* 0, 1 */, MCK_MSA128AsmReg, AMFBS_HasStdEnc_HasMSA },
9926 { 4644 /* frcp.w */, 3 /* 0, 1 */, MCK_MSA128AsmReg, AMFBS_HasStdEnc_HasMSA },
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/build/MacOS/include/llvm/IR/
DIntrinsics.gen2488 mips_frcp_d, // llvm.mips.frcp.d
2489 mips_frcp_w, // llvm.mips.frcp.w
8512 "llvm.mips.frcp.d",
8513 "llvm.mips.frcp.w",
16397 1, // llvm.mips.frcp.d
16398 1, // llvm.mips.frcp.w
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/build/Fuchsia/include/llvm/IR/
DIntrinsics.gen2494 mips_frcp_d, // llvm.mips.frcp.d
2495 mips_frcp_w, // llvm.mips.frcp.w
8552 "llvm.mips.frcp.d",
8553 "llvm.mips.frcp.w",
16492 1, // llvm.mips.frcp.d
16493 1, // llvm.mips.frcp.w
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/
DIntrinsics.gen2494 mips_frcp_d, // llvm.mips.frcp.d
2495 mips_frcp_w, // llvm.mips.frcp.w
8552 "llvm.mips.frcp.d",
8553 "llvm.mips.frcp.w",
16492 1, // llvm.mips.frcp.d
16493 1, // llvm.mips.frcp.w
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/build/Windows/include/llvm/IR/
DIntrinsics.gen2494 mips_frcp_d, // llvm.mips.frcp.d
2495 mips_frcp_w, // llvm.mips.frcp.w
8552 "llvm.mips.frcp.d",
8553 "llvm.mips.frcp.w",
16492 1, // llvm.mips.frcp.d
16493 1, // llvm.mips.frcp.w
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/
DIntrinsics.gen2494 mips_frcp_d, // llvm.mips.frcp.d
2495 mips_frcp_w, // llvm.mips.frcp.w
8552 "llvm.mips.frcp.d",
8553 "llvm.mips.frcp.w",
16492 1, // llvm.mips.frcp.d
16493 1, // llvm.mips.frcp.w
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/include/llvm/IR/
DIntrinsicImpl.inc3975 "llvm.mips.frcp.d",
3976 "llvm.mips.frcp.w",
14108 1, // llvm.mips.frcp.d
14109 1, // llvm.mips.frcp.w