| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRTargetMachine.cpp | 31 static StringRef getCPU(StringRef CPU) { in getCPU() function
49 : LLVMTargetMachine(T, AVRDataLayout, TT, getCPU(CPU), FS, Options, in AVRTargetMachine()
52 SubTarget(TT, getCPU(CPU), FS, *this) { in AVRTargetMachine()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/Utils/ |
| D | AMDGPUBaseInfo.cpp | 228 auto Version = getIsaVersion(STI->getCPU()); in streamIsaVersion()
328 IsaVersion Version = getIsaVersion(STI->getCPU()); in getSGPRAllocGranule()
341 IsaVersion Version = getIsaVersion(STI->getCPU()); in getTotalNumSGPRs()
351 IsaVersion Version = getIsaVersion(STI->getCPU()); in getAddressableNumSGPRs()
362 IsaVersion Version = getIsaVersion(STI->getCPU()); in getMinNumSGPRs()
381 IsaVersion Version = getIsaVersion(STI->getCPU()); in getMaxNumSGPRs()
399 IsaVersion Version = getIsaVersion(STI->getCPU()); in getNumExtraSGPRs()
484 IsaVersion Version = getIsaVersion(STI->getCPU()); in initDefaultAMDKernelCodeT()
520 IsaVersion Version = getIsaVersion(STI->getCPU()); in getDefaultAmdhsaKernelDescriptor()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MC/MCDisassembler/ |
| D | Disassembler.cpp | 173 if (DC->getCPU().empty()) in getItineraryLatency()
178 InstrItineraryData IID = STI->getInstrItineraryForCPU(DC->getCPU()); in getItineraryLatency()
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| D | Disassembler.h | 118 StringRef getCPU() const { return CPU; } in getCPU() function
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMTargetStreamer.cpp | 120 if (STI.getCPU() == "xscale") in getArchForCPU()
165 const StringRef CPUString = STI.getCPU(); in emitTargetAttributes()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsAsmBackend.cpp | 589 STI.getCPU(), Options); in createMipsAsmBackend()
590 return new MipsAsmBackend(T, MRI, STI.getTargetTriple(), STI.getCPU(), in createMipsAsmBackend()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/ |
| D | MCSubtargetInfo.h | 105 StringRef getCPU() const { return CPU; } in getCPU() function
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonMCDuplexInfo.cpp | 642 if (STI.getCPU().equals_lower("hexagonv5") || in isOrderedDuplexPair()
643 STI.getCPU().equals_lower("hexagonv55") || in isOrderedDuplexPair()
644 STI.getCPU().equals_lower("hexagonv60")) { in isOrderedDuplexPair()
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| D | HexagonMCTargetDesc.cpp | 418 auto F = ElfFlags.find(STI.getCPU()); in GetELFFlags()
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| D | HexagonAsmBackend.cpp | 772 StringRef CPUString = Hexagon_MC::selectHexagonCPU(STI.getCPU()); in createHexagonAsmBackend()
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| D | HexagonShuffler.cpp | 204 HexagonCVIResource::SetupTUL(&TUL, STI.getCPU()); in HexagonShuffler()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| D | AMDGPUTargetStreamer.cpp | 262 IsaVersion IVersion = getIsaVersion(STI.getCPU()); in EmitAmdhsaKernelDescriptor()
403 EFlags |= getElfMach(STI.getCPU()); in AMDGPUTargetELFStreamer()
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| D | AMDGPUInstPrinter.cpp | 1283 AMDGPU::IsaVersion ISA = AMDGPU::getIsaVersion(STI.getCPU()); in printWaitFlag()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64SIMDInstrOpt.cpp | 222 std::string Subtarget = SchedModel.getSubtargetInfo()->getCPU(); in shouldReplaceInst()
291 std::string Subtarget = SchedModel.getSubtargetInfo()->getCPU(); in shouldExitEarly()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUMCInstLower.cpp | 326 if (!MI->isPseudo() && STI.isCPUStringValid(STI.getCPU())) { in EmitInstruction()
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| D | AMDGPUAsmPrinter.cpp | 150 IsaVersion Version = getIsaVersion(getGlobalSTI()->getCPU()); in EmitStartOfAsmFile()
1072 if (getIsaVersion(getGlobalSTI()->getCPU()).Major >= 10) { in getSIProgramInfo()
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| D | SIMemoryLegalizer.cpp | 652 IV = getIsaVersion(ST.getCPU()); in SICacheControl()
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| D | GCNHazardRecognizer.cpp | 966 const AMDGPU::IsaVersion IV = AMDGPU::getIsaVersion(ST.getCPU()); in fixSMEMtoVectorWriteHazards()
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| D | SIInsertWaitcnts.cpp | 1469 IV = AMDGPU::getIsaVersion(ST->getCPU()); in runOnMachineFunction()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/AsmParser/ |
| D | AMDGPUAsmParser.cpp | 1121 AMDGPU::IsaVersion ISA = AMDGPU::getIsaVersion(getSTI().getCPU()); in AMDGPUAsmParser()
2292 if (AMDGPU::getIsaVersion(getSTI().getCPU()).Major < 6) in updateGprCountSymbols()
3654 IsaVersion Version = getIsaVersion(getSTI().getCPU()); in calculateGPRBlocks()
3702 IsaVersion IVersion = getIsaVersion(getSTI().getCPU()); in ParseDirectiveAMDHSAKernel()
3996 AMDGPU::IsaVersion ISA = AMDGPU::getIsaVersion(getSTI().getCPU()); in ParseDirectiveHSACodeObjectISA()
4929 AMDGPU::IsaVersion ISA = AMDGPU::getIsaVersion(getSTI().getCPU()); in parseCnt()
4965 AMDGPU::IsaVersion ISA = AMDGPU::getIsaVersion(getSTI().getCPU()); in parseSWaitCntOps()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 515 sti.getCPU(), Options)) { in MipsAsmParser()
550 if (getSTI().getCPU() == "mips64r6" && inMicroMipsMode()) in MipsAsmParser()
|