| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 240 assert(VA.getLocVT() == MVT::v2i32); in LowerReturn_32()
253 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn_32()
262 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn_32()
325 OutVal = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
328 OutVal = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
331 OutVal = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), OutVal); in LowerReturn_64()
357 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn_64()
418 assert(VA.getLocVT() == MVT::f64 || VA.getLocVT() == MVT::v2i32); in LowerFormalArguments_32()
444 WholeValue = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), WholeValue); in LowerFormalArguments_32()
451 if (VA.getLocVT() == MVT::f32) in LowerFormalArguments_32()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/ |
| D | ARCISelLowering.cpp | 273 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
276 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
279 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
485 EVT RegVT = VA.getLocVT(); in LowerCallArguments()
502 unsigned ObjSize = VA.getLocVT().getStoreSize(); in LowerCallArguments()
511 ArgIn = DAG.getLoad(VA.getLocVT(), dl, Chain, FIN, in LowerCallArguments()
641 unsigned ObjSize = VA.getLocVT().getStoreSize(); in LowerReturn()
669 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86CallLowering.cpp | 138 unsigned LocSize = VA.getLocVT().getSizeInBits(); in assignValueToReg()
153 MPO, MachineMemOperand::MOStore, VA.getLocVT().getStoreSize(), in assignValueToAddress()
272 unsigned LocSize = VA.getLocVT().getSizeInBits(); in assignValueToReg()
285 auto Copy = MIRBuilder.buildCopy(LLT{VA.getLocVT()}, PhysReg); in assignValueToReg()
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| D | X86FastISel.cpp | 3333 assert(VA.getLocVT().isInteger() && !VA.getLocVT().isVector() && in fastLowerCall()
3339 bool Emitted = X86FastEmitExtend(ISD::SIGN_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
3342 ArgVT = VA.getLocVT(); in fastLowerCall()
3346 assert(VA.getLocVT().isInteger() && !VA.getLocVT().isVector() && in fastLowerCall()
3359 bool Emitted = X86FastEmitExtend(ISD::ZERO_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
3362 ArgVT = VA.getLocVT(); in fastLowerCall()
3366 assert(VA.getLocVT().isInteger() && !VA.getLocVT().isVector() && in fastLowerCall()
3368 bool Emitted = X86FastEmitExtend(ISD::ANY_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
3371 Emitted = X86FastEmitExtend(ISD::ZERO_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
3374 Emitted = X86FastEmitExtend(ISD::SIGN_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 229 EVT RegVT = VA.getLocVT(); in LowerFormalArguments()
262 InVals.push_back(DAG.getConstant(0, DL, VA.getLocVT())); in LowerFormalArguments()
337 Arg = DAG.getNode(ISD::SIGN_EXTEND, CLI.DL, VA.getLocVT(), Arg); in LowerCall()
340 Arg = DAG.getNode(ISD::ZERO_EXTEND, CLI.DL, VA.getLocVT(), Arg); in LowerCall()
343 Arg = DAG.getNode(ISD::ANY_EXTEND, CLI.DL, VA.getLocVT(), Arg); in LowerCall()
442 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
| D | LanaiISelLowering.cpp | 460 EVT RegVT = VA.getLocVT(); in LowerCCCArguments()
492 unsigned ObjSize = VA.getLocVT().getSizeInBits() / 8; in LowerCCCArguments()
496 << EVT(VA.getLocVT()).getEVTString() << "\n"; in LowerCCCArguments()
505 VA.getLocVT(), DL, Chain, FIN, in LowerCCCArguments()
561 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
667 Arg = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), Arg); in LowerCCCCallTo()
670 Arg = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), Arg); in LowerCCCCallTo()
673 Arg = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), Arg); in LowerCCCCallTo()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMCallLowering.cpp | 121 assert(VA.getLocVT().getSizeInBits() <= 64 && "Unsupported location size"); in assignValueToReg()
135 MPO, MachineMemOperand::MOStore, VA.getLocVT().getStoreSize(), in assignValueToAddress()
343 auto LocSize = VA.getLocVT().getSizeInBits(); in assignValueToReg()
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| D | ARMCallingConv.cpp | 181 assert(PendingMembers[0].getLocVT() == LocVT); in CC_ARM_AAPCS_Custom_Aggregate()
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| D | ARMFastISel.cpp | 1915 if (VA.getLocVT() != MVT::f64 || in ProcessCallArgs()
1965 MVT DestVT = VA.getLocVT(); in ProcessCallArgs()
1974 MVT DestVT = VA.getLocVT(); in ProcessCallArgs()
1981 unsigned BC = fastEmit_r(ArgVT, VA.getLocVT(), ISD::BITCAST, Arg, in ProcessCallArgs()
1985 ArgVT = VA.getLocVT(); in ProcessCallArgs()
1998 assert(VA.getLocVT() == MVT::f64 && in ProcessCallArgs()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 3256 MVT ValVT = VA.getValVT(), LocVT = VA.getLocVT(); in LowerCall()
3328 unsigned LocSizeInBits = VA.getLocVT().getSizeInBits(); in LowerCall()
3330 ISD::SHL, DL, VA.getLocVT(), Arg, in LowerCall()
3331 DAG.getConstant(LocSizeInBits - ValSizeInBits, DL, VA.getLocVT())); in LowerCall()
3485 RVLocs[i].getLocVT(), InFlag); in LowerCallResult()
3491 unsigned LocSizeInBits = VA.getLocVT().getSizeInBits(); in LowerCallResult()
3495 Shift, DL, VA.getLocVT(), Val, in LowerCallResult()
3496 DAG.getConstant(LocSizeInBits - ValSizeInBits, DL, VA.getLocVT())); in LowerCallResult()
3513 Val = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Val, in LowerCallResult()
3519 Val = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), Val, in LowerCallResult()
[all …]
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| D | MipsCallLowering.cpp | 168 auto Copy = MIRBuilder.buildCopy(LLT{VA.getLocVT()}, PhysReg); in assignValueToReg()
323 LLT LocTy{VA.getLocVT()}; in extendRegister()
406 VA.getLocMemOffset(), VA.getLocVT(), LocInfo); in setLocInfo()
409 VA.getLocReg(), VA.getLocVT(), LocInfo); in setLocInfo()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| D | RISCVISelLowering.cpp | 1430 VA1.getLocVT(), CCValAssign::Full)); in CC_RISCVAssign2XLen()
1437 VA1.getLocVT(), CCValAssign::Full)); in CC_RISCVAssign2XLen()
1687 if (VA.getLocVT() == MVT::i64 && VA.getValVT() == MVT::f32) { in convertLocVTToValVT()
1703 EVT LocVT = VA.getLocVT(); in unpackFromRegLoc()
1734 EVT LocVT = VA.getLocVT(); in convertValVTToLocVT()
1742 if (VA.getLocVT() == MVT::i64 && VA.getValVT() == MVT::f32) { in convertValVTToLocVT()
1758 EVT LocVT = VA.getLocVT(); in unpackFromMemLoc()
1784 assert(VA.getLocVT() == MVT::i32 && VA.getValVT() == MVT::f64 && in unpackF64OnRV32DSoftABI()
1926 if (VA.getLocVT() == MVT::i32 && VA.getValVT() == MVT::f64) in LowerFormalArguments()
2171 VA.getLocVT() == MVT::i32 && VA.getValVT() == MVT::f64; in LowerCall()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 643 EVT RegVT = VA.getLocVT(); in LowerCCCArguments()
686 unsigned ObjSize = VA.getLocVT().getSizeInBits()/8; in LowerCCCArguments()
689 << EVT(VA.getLocVT()).getEVTString() in LowerCCCArguments()
699 VA.getLocVT(), dl, Chain, FIN, in LowerCCCArguments()
771 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
837 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
840 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
843 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 1151 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
1154 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
1157 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo()
1302 EVT RegVT = VA.getLocVT(); in LowerCCCArguments()
1322 unsigned ObjSize = VA.getLocVT().getSizeInBits()/8; in LowerCCCArguments()
1325 << EVT(VA.getLocVT()).getEVTString() in LowerCCCArguments()
1336 ArgIn = DAG.getLoad(VA.getLocVT(), dl, Chain, FIN, in LowerCCCArguments()
1479 unsigned ObjSize = VA.getLocVT().getSizeInBits() / 8; in LowerReturn()
1507 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUCallLowering.cpp | 55 if (VA.getLocVT().getSizeInBits() < 32) { in assignValueToReg()
98 if (VA.getLocVT().getSizeInBits() < 32) { in assignValueToReg()
110 auto Copy = MIRBuilder.buildCopy(LLT{VA.getLocVT()}, PhysReg); in assignValueToReg()
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| D | SIISelLowering.cpp | 1542 MemVT = VA.getLocVT(); in lowerStackParameter()
1556 ExtType, SL, VA.getLocVT(), Chain, FIN, in lowerStackParameter()
2139 MVT VT = VA.getLocVT(); in LowerFormalArguments()
2143 EVT MemVT = VA.getLocVT(); in LowerFormalArguments()
2330 Arg = DAG.getNode(ISD::BITCAST, DL, VA.getLocVT(), Arg); in LowerReturn()
2333 Arg = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), Arg); in LowerReturn()
2336 Arg = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), Arg); in LowerReturn()
2339 Arg = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), Arg); in LowerReturn()
2347 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
2397 Val = DAG.getCopyFromReg(Chain, DL, VA.getLocReg(), VA.getLocVT(), InFlag); in LowerCallResult()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | CallingConvLower.h | 153 MVT getLocVT() const { return LocVT; } in getLocVT() function
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64CallLowering.cpp | 81 auto Copy = MIRBuilder.buildCopy(LLT{VA.getLocVT()}, PhysReg); in assignValueToReg()
179 Size = VA.getLocVT().getSizeInBits() / 8; in assignValueToAddress()
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| D | AArch64ISelLowering.cpp | 3400 EVT RegVT = VA.getLocVT(); in LowerFormalArguments()
3476 MemVT = VA.getLocVT(); in LowerFormalArguments()
3494 ExtType, DL, VA.getLocVT(), Chain, FIN, in LowerFormalArguments()
3695 assert(!VA.needsCustom() && VA.getLocVT() == MVT::i64 && in LowerCallResult()
3706 DAG.getCopyFromReg(Chain, DL, VA.getLocReg(), VA.getLocVT(), InFlag); in LowerCallResult()
3721 Val = DAG.getNode(ISD::SRL, DL, VA.getLocVT(), Val, in LowerCallResult()
3722 DAG.getConstant(32, DL, VA.getLocVT())); in LowerCallResult()
4068 Arg = DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), Arg); in LowerCall()
4071 Arg = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), Arg); in LowerCall()
4079 Arg = DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), Arg); in LowerCall()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 222 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
450 Arg = DAG.getBitcast(VA.getLocVT(), Arg); in LowerCall()
453 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
456 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
459 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
470 (unsigned)VA.getLocVT().getStoreSizeInBits() >> 3); in LowerCall()
788 MVT RegVT = VA.getLocVT(); in LowerFormalArguments()
821 : VA.getLocVT().getStoreSizeInBits() / 8; in LowerFormalArguments()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.cpp | 1070 EVT RegVT = VA.getLocVT(); in LowerFormalArguments()
1114 EVT LocVT = VA.getLocVT(); in LowerFormalArguments()
1199 EVT RegVT = VA.getLocVT(); in LowerCall()
1408 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); in LowerReturn()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 1277 Value = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), Value, in convertLocVTToValVT()
1280 Value = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Value, in convertLocVTToValVT()
1288 assert(VA.getLocVT() == MVT::i64); in convertLocVTToValVT()
1304 return DAG.getNode(ISD::SIGN_EXTEND, DL, VA.getLocVT(), Value); in convertValVTToLocVT()
1306 return DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), Value); in convertValVTToLocVT()
1308 return DAG.getNode(ISD::ANY_EXTEND, DL, VA.getLocVT(), Value); in convertValVTToLocVT()
1312 assert(VA.getLocVT() == MVT::i64); in convertValVTToLocVT()
1315 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VA.getLocVT(), Value, in convertValVTToLocVT()
1351 EVT LocVT = VA.getLocVT(); in LowerFormalArguments()
1399 if (VA.getLocVT() == MVT::i32 || VA.getLocVT() == MVT::f32) in LowerFormalArguments()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | CallLowering.cpp | 460 LLT LocTy{VA.getLocVT()}; in extendRegister()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCFastISel.cpp | 1442 MVT DestVT = VA.getLocVT(); in processCallArgs()
1454 MVT DestVT = VA.getLocVT(); in processCallArgs()
1751 MVT DestVT = VA.getLocVT(); in SelectRet()
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| D | PPCISelLowering.cpp | 3583 if (VA.getLocVT() == MVT::f64 && Subtarget.hasSPE()) { in LowerFormalArguments_32SVR4()
3607 unsigned ArgSize = VA.getLocVT().getStoreSize(); in LowerFormalArguments_32SVR4()
5017 if (Subtarget.hasSPE() && VA.getLocVT() == MVT::f64) { in LowerCallResult()
5032 VA.getLocReg(), VA.getLocVT(), InFlag); in LowerCallResult()
5044 Val = DAG.getNode(ISD::AssertZext, dl, VA.getLocVT(), Val, in LowerCallResult()
5049 Val = DAG.getNode(ISD::AssertSext, dl, VA.getLocVT(), Val, in LowerCallResult()
5734 seenFloatArg |= VA.getLocVT().isFloatingPoint(); in LowerCall_32SVR4()
7029 MVT LocVT = VA.getLocVT(); in LowerFormalArguments_AIX()
7133 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall_AIX()
7136 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall_AIX()
[all …]
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