/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
D | ARMGenMCCodeEmitter.inc | 4511 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4515 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4527 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4531 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4535 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4551 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4555 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 4563 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 4567 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 4572 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); [all …]
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/MCTargetDesc/ |
D | SystemZMCCodeEmitter.cpp | 59 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO, 172 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in SystemZMCCodeEmitter 186 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDAddr12Encoding() 187 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDAddr12Encoding() 196 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDAddr20Encoding() 197 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDAddr20Encoding() 206 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDXAddr12Encoding() 207 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDXAddr12Encoding() 208 uint64_t Index = getMachineOpValue(MI, MI.getOperand(OpNum + 2), Fixups, STI); in getBDXAddr12Encoding() 217 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDXAddr20Encoding() [all …]
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/ |
D | MipsGenMCCodeEmitter.inc | 2825 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2830 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 2865 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2870 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 2875 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 2883 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2888 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 2903 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 2923 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 2936 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); [all …]
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/MCTargetDesc/ |
D | PPCMCCodeEmitter.cpp | 47 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getDirectBrEncoding() 59 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getCondBrEncoding() 72 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getAbsDirectBrEncoding() 85 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getAbsCondBrEncoding() 97 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getImm16Encoding() 111 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI) << 16; in getMemRIEncoding() 115 return (getMachineOpValue(MI, MO, Fixups, STI) & 0xFFFF) | RegBits; in getMemRIEncoding() 129 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI) << 14; in getMemRIXEncoding() 133 return ((getMachineOpValue(MI, MO, Fixups, STI) >> 2) & 0x3FFF) | RegBits; in getMemRIXEncoding() 147 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI) << 12; in getMemRIX16Encoding() [all …]
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D | PPCMCCodeEmitter.h | 83 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
D | AArch64GenMCCodeEmitter.inc | 5511 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5520 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5545 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5549 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5554 op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); 5559 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5570 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 5574 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 5579 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 5588 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); [all …]
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/ |
D | PPCGenMCCodeEmitter.inc | 2512 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2521 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2543 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2548 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 2562 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2567 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 2572 op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); 2609 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); 2614 op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); 2674 op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); [all …]
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/MCTargetDesc/ |
D | MipsMCCodeEmitter.cpp | 539 unsigned Res = getMachineOpValue(MI, MO, Fixups, STI); in getUImm5Lsl2Encoding() 747 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in MipsMCCodeEmitter 773 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups, STI) in getMemEncoding() 775 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI); in getMemEncoding() 789 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4() 791 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4() 803 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4Lsl1() 805 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4Lsl1() 817 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4Lsl2() 819 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4Lsl2() [all …]
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D | MipsMCCodeEmitter.h | 180 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/MCTargetDesc/ |
D | SparcMCCodeEmitter.cpp | 68 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO, 115 uint64_t op = getMachineOpValue(MI, MO, Fixups, STI); in encodeInstruction() 124 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in SparcMCCodeEmitter 155 return getMachineOpValue(MI, MO, Fixups, STI); in getCallTargetOpValue() 190 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchTargetOpValue() 203 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchPredTargetOpValue() 216 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchOnRegTargetOpValue()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/MCTargetDesc/ |
D | LanaiMCCodeEmitter.cpp | 57 unsigned getMachineOpValue(const MCInst &Inst, const MCOperand &MCOp, 109 unsigned LanaiMCCodeEmitter::getMachineOpValue( in getMachineOpValue() function in llvm::LanaiMCCodeEmitter 212 getMachineOpValue(Inst, Op2, Fixups, SubtargetInfo); in getRiMemoryOpValue() 283 getMachineOpValue(Inst, Op2, Fixups, SubtargetInfo); in getSplsOpValue() 293 return getMachineOpValue(Inst, MCOp, Fixups, SubtargetInfo); in getBranchTargetOpValue()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
D | SIMCCodeEmitter.cpp | 64 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO, 304 OS.write((uint8_t)getMachineOpValue(MI, MI.getOperand(vaddr0 + 1 + i), in encodeInstruction() 359 return getMachineOpValue(MI, MO, Fixups, STI); in getSOPPBrEncoding() 451 uint64_t SIMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in SIMCCodeEmitter
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D | R600MCCodeEmitter.cpp | 53 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO, 171 uint64_t R600MCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in R600MCCodeEmitter
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D | AMDGPUMCCodeEmitter.h | 42 virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/MCTargetDesc/ |
D | BPFMCCodeEmitter.cpp | 53 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO, 86 unsigned BPFMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in BPFMCCodeEmitter
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/MCTargetDesc/ |
D | MSP430MCCodeEmitter.cpp | 53 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO, 101 unsigned MSP430MCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in llvm::MSP430MCCodeEmitter
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/MCTargetDesc/ |
D | HexagonMCCodeEmitter.h | 68 unsigned getMachineOpValue(MCInst const &MI, MCOperand const &MO,
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D | HexagonMCCodeEmitter.cpp | 719 HexagonMCCodeEmitter::getMachineOpValue(MCInst const &MI, MCOperand const &MO, in getMachineOpValue() function in HexagonMCCodeEmitter
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/MCTargetDesc/ |
D | AVRMCCodeEmitter.h | 94 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
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D | AVRMCCodeEmitter.cpp | 250 unsigned AVRMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in llvm::AVRMCCodeEmitter
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/MCTargetDesc/ |
D | RISCVMCCodeEmitter.cpp | 72 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO, 216 RISCVMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in RISCVMCCodeEmitter
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/MCTargetDesc/ |
D | AArch64MCCodeEmitter.cpp | 62 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO, 201 AArch64MCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in AArch64MCCodeEmitter
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
D | ARMMCCodeEmitter.cpp | 86 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO, 560 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in ARMMCCodeEmitter
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