| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsMachineFunction.cpp | 50 MF.getRegInfo().createVirtualRegister(&getGlobalBaseRegClass(MF)); in getGlobalBaseReg()
68 MachineRegisterInfo &RegInfo = MF.getRegInfo(); in initGlobalBaseReg()
81 MF.getRegInfo().addLiveIn(Mips::T9_64); in initGlobalBaseReg()
109 MF.getRegInfo().addLiveIn(Mips::T9); in initGlobalBaseReg()
144 MF.getRegInfo().addLiveIn(Mips::V0); in initGlobalBaseReg()
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| D | MipsRegisterBankInfo.cpp | 199 const MachineRegisterInfo &MRI = MF.getRegInfo(); in skipCopiesOutgoing()
213 const MachineRegisterInfo &MRI = MF.getRegInfo(); in skipCopiesIncoming()
226 const MachineRegisterInfo &MRI = MI->getMF()->getRegInfo(); in AmbiguousRegDefUseContainer()
341 const MachineRegisterInfo &MRI = MF.getRegInfo(); in setTypesAccordingToPhysicalRegister()
406 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getInstrMapping()
675 LegalizationArtifactCombiner ArtCombiner(B, MF->getRegInfo(), LegInfo); in applyMappingImpl()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCRegisterInfo.cpp | 163 bool SaveR2 = MF->getRegInfo().isAllocatable(PPC::X2); in getCalleeSavedRegs()
529 Register Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerDynamicAlloc()
558 NegSizeReg = MF.getRegInfo().createVirtualRegister(G8RC); in lowerDynamicAlloc()
566 NegSizeReg = MF.getRegInfo().createVirtualRegister(G8RC); in lowerDynamicAlloc()
583 NegSizeReg = MF.getRegInfo().createVirtualRegister(GPRC); in lowerDynamicAlloc()
591 NegSizeReg = MF.getRegInfo().createVirtualRegister(GPRC); in lowerDynamicAlloc()
657 Register Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRSpilling()
669 Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRSpilling()
702 Register Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRRestore()
714 Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRRestore()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/ |
| D | NVPTXPeephole.cpp | 82 const auto &MRI = MF.getRegInfo(); in isCVTAToLocalCombinationCandidate()
107 const auto &MRI = MF.getRegInfo(); in CombineCVTAToLocal()
146 const auto &MRI = MF.getRegInfo(); in runOnMachineFunction()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyRegNumbering.cpp | 67 MachineRegisterInfo &MRI = MF.getRegInfo(); in runOnMachineFunction()
87 unsigned NumVRegs = MF.getRegInfo().getNumVirtRegs(); in runOnMachineFunction()
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| D | WebAssemblyInstrInfo.cpp | 62 auto &MRI = MBB.getParent()->getRegInfo(); in copyPhysReg()
196 auto &MRI = MF.getRegInfo(); in insertBranch()
226 auto &MRI = MF.getRegInfo(); in reverseBranchCondition()
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| D | WebAssemblyRegisterInfo.cpp | 61 MachineRegisterInfo &MRI = MF.getRegInfo(); in eliminateFrameIndex()
96 MachineInstr *Def = MF.getRegInfo().getUniqueVRegDef(OtherMOReg); in eliminateFrameIndex()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | LivePhysRegs.cpp | 174 const MachineRegisterInfo &MRI = MF.getRegInfo(); in addCalleeSavedRegs()
245 const MachineRegisterInfo &MRI = MF.getRegInfo(); in computeLiveIns()
256 const MachineRegisterInfo &MRI = MF.getRegInfo(); in addLiveIns()
277 const MachineRegisterInfo &MRI = MF.getRegInfo(); in recomputeLivenessFlags()
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| D | SwiftErrorValueTracking.cpp | 37 auto VReg = MF->getRegInfo().createVirtualRegister(RC); in getOrCreateVReg()
59 Register VReg = MF->getRegInfo().createVirtualRegister(RC); in getOrCreateVRegDefAt()
133 Register VReg = MF->getRegInfo().createVirtualRegister(RC); in createEntriesInEntryBlock()
243 UpwardsUse ? UUseVReg : MF->getRegInfo().createVirtualRegister(RC); in propagateVRegs()
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| D | TargetFrameLoweringImpl.cpp | 94 const MCPhysReg *CSRegs = MF.getRegInfo().getCalleeSavedRegs(); in determineCalleeSaves()
119 const MachineRegisterInfo &MRI = MF.getRegInfo(); in determineCalleeSaves()
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| D | RegAllocPBQP.cpp | 458 if (!MF.getRegInfo().isAllocatable(DstReg)) in apply()
557 const MachineRegisterInfo &MRI = MF.getRegInfo(); in findVRegIntervalsToAlloc()
570 const MCPhysReg *CSR = MF.getRegInfo().getCalleeSavedRegs(); in isACalleeSavedRegister()
582 const MachineRegisterInfo &MRI = G.getMetadata().MF.getRegInfo(); in initializeGraph()
745 MachineRegisterInfo &MRI = MF.getRegInfo(); in finalizeAlloc()
759 if (!VRM.getRegInfo().isReserved(CandidateReg)) { in finalizeAlloc()
801 MF.getRegInfo().freezeReservedRegs(MF); in runOnMachineFunction()
879 const MachineRegisterInfo &MRI = G.getMetadata().MF.getRegInfo(); in PrintNodeInfo()
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| D | VirtRegMap.cpp | 63 MRI = &mf.getRegInfo(); in runOnMachineFunction()
77 unsigned NumRegs = MF->getRegInfo().getNumVirtRegs(); in grow()
88 assert(!getRegInfo().isReserved(physReg) && in assignVirt2Phys()
123 const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(virtReg); in assignVirt2StackSlot()
239 MRI = &MF->getRegInfo(); in runOnMachineFunction()
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| D | RegisterClassInfo.cpp | 58 const MCPhysReg *CSR = MF->getRegInfo().getCalleeSavedRegs(); in runOnMachineFunction()
72 const BitVector &RR = MF->getRegInfo().getReservedRegs(); in runOnMachineFunction()
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| D | MIRCanonicalizerPass.cpp | 221 MachineRegisterInfo *MRI = &MBB->getParent()->getRegInfo(); in rescheduleCanonically()
305 MachineRegisterInfo &MRI = MBB->getParent()->getRegInfo(); in propagateLocalCopies()
430 MachineRegisterInfo &MRI = MF.getRegInfo(); in runOnMachineFunction()
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| D | MIRNamerPass.cpp | 58 VRegRenamer Renamer(MF.getRegInfo()); in runOnMachineFunction()
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| D | PHIEliminationUtils.cpp | 35 MachineRegisterInfo& MRI = MBB->getParent()->getRegInfo(); in findPHICopyInsertPoint()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUCallLowering.cpp | 226 MachineRegisterInfo &MRI = MF.getRegInfo(); in unpackRegsToOrigType()
273 MachineRegisterInfo &MRI = MF.getRegInfo(); in lowerReturnVal()
287 OutgoingValueHandler RetHandler(B, MF.getRegInfo(), Ret, AssignFn); in lowerReturnVal()
296 MachineRegisterInfo &MRI = MF.getRegInfo(); in lowerReturn()
346 MachineRegisterInfo &MRI = MF.getRegInfo(); in lowerParameterPtr()
410 MachineRegisterInfo &MRI = MF.getRegInfo(); in allocateHSAUserSGPRs()
441 MachineRegisterInfo &MRI = MF.getRegInfo(); in lowerFormalArgumentsKernel()
581 MachineRegisterInfo &MRI = MF.getRegInfo(); in lowerFormalArguments()
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| D | SIFrameLowering.cpp | 121 MF->getRegInfo(), LiveRegs, AMDGPU::VGPR_32RegClass); in buildPrologSpill()
168 MF->getRegInfo(), LiveRegs, AMDGPU::VGPR_32RegClass); in buildEpilogReload()
212 MachineRegisterInfo &MRI = MF.getRegInfo(); in emitFlatScratchInit()
275 MachineRegisterInfo &MRI = MF.getRegInfo(); in getReservedPrivateSegmentBufferReg()
322 MachineRegisterInfo &MRI = MF.getRegInfo(); in getReservedPrivateSegmentWaveByteOffsetReg()
407 MachineRegisterInfo &MRI = MF.getRegInfo(); in emitEntryFunctionPrologue()
573 MF.getRegInfo().addLiveIn(GitPtrLo); in emitEntryFunctionScratchSetup()
637 MF.getRegInfo().addLiveIn(MFI->getImplicitBufferPtrUserSGPR()); in emitEntryFunctionScratchSetup()
685 MachineRegisterInfo &MRI = MF.getRegInfo(); in emitPrologue()
830 MachineRegisterInfo &MRI = MF.getRegInfo(); in emitEpilogue()
[all …]
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| D | GCNRegPressure.h | 213 auto &MRI = (*R.begin())->getParent()->getParent()->getRegInfo(); in getLiveRegMap()
243 MI.getParent()->getParent()->getRegInfo()); in getLiveRegsAfter()
249 MI.getParent()->getParent()->getRegInfo()); in getLiveRegsBefore()
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| D | GCNHazardRecognizer.cpp | 49 MaxLookAhead = MF.getRegInfo().isPhysRegUsed(AMDGPU::AGPR0) ? 18 : 5; in GCNHazardRecognizer()
592 if (!Use.isReg() || TRI.isVGPR(MF.getRegInfo(), Use.getReg())) in checkVMEMHazards()
614 if (!Use.isReg() || !TRI->isVGPR(MF.getRegInfo(), Use.getReg())) in checkDPPHazards()
748 const MachineRegisterInfo &MRI = MF.getRegInfo(); in checkVALUHazards()
770 const MachineRegisterInfo &MRI = MF.getRegInfo(); in checkInlineAsmHazards()
787 const MachineRegisterInfo &MRI = MF.getRegInfo(); in checkRWLaneHazards()
835 if (!Use.isReg() || TRI->isVGPR(MF.getRegInfo(), Use.getReg())) in checkAnyInstHazards()
1220 if (!Use.isReg() || !TRI.isVGPR(MF.getRegInfo(), Use.getReg())) in checkMAIHazards()
1240 if (!Op.isReg() || !TRI.isAGPR(MF.getRegInfo(), Op.getReg())) in checkMAIHazards()
1377 if (!Op.isReg() || !TRI.isVGPR(MF.getRegInfo(), Op.getReg())) in checkMAILdStHazards()
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| D | AMDGPUMacroFusion.cpp | 45 const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo(); in shouldScheduleAdjacent()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
| D | LanaiMachineFunctionInfo.cpp | 21 MF.getRegInfo().createVirtualRegister(&Lanai::GPRRegClass); in getGlobalBaseReg()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86RegisterBankInfo.cpp | 148 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getSameOperandsMapping()
164 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getInstrMapping()
283 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getInstrAlternativeMappings()
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| D | X86MachineFunctionInfo.cpp | 23 for (const MCPhysReg *CSR = MF->getRegInfo().getCalleeSavedRegs(); in setRestoreBasePointer()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMBaseRegisterInfo.cpp | 307 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getRegAllocationHints()
357 MachineRegisterInfo *MRI = &MF.getRegInfo(); in updateRegAllocHint()
417 const MachineRegisterInfo *MRI = &MF.getRegInfo(); in canRealignStack()
643 MachineRegisterInfo &MRI = MBB->getParent()->getRegInfo(); in materializeFrameBaseRegister()
822 ScratchReg = MF.getRegInfo().createVirtualRegister(RegClass); in eliminateFrameIndex()
845 const MachineRegisterInfo &MRI = MF->getRegInfo(); in shouldCoalesce()
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