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Searched refs:getSlotIndexes (Results 1 – 17 of 17) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DSplitKit.cpp231 std::tie(Start, Stop) = LIS.getSlotIndexes()->getMBBRange(BI.MBB); in calcLiveBlockInfo()
383 LRCalc[0].reset(&VRM.getMachineFunction(), LIS.getSlotIndexes(), &MDT, in reset()
386 LRCalc[1].reset(&VRM.getMachineFunction(), LIS.getSlotIndexes(), &MDT, in reset()
523 SlotIndexes &Indexes = *LIS.getSlotIndexes(); in buildSingleSubRegCopy()
546 SlotIndexes &Indexes = *LIS.getSlotIndexes(); in buildCopy()
1176 std::tie(BlockStart, BlockEnd) = LIS.getSlotIndexes()->getMBBRange(&*MBB); in transferValues()
1293 SubLRC.reset(&VRM.getMachineFunction(), LIS.getSlotIndexes(), &MDT, in extendPHIKillRanges()
1296 LI.computeSubRangeUndefs(Undefs, PS.LaneMask, MRI, *LIS.getSlotIndexes()); in extendPHIKillRanges()
1389 SubLRC.reset(&VRM.getMachineFunction(), LIS.getSlotIndexes(), &MDT, in rewriteAssigned()
1392 LI.computeSubRangeUndefs(Undefs, S.LaneMask, MRI, *LIS.getSlotIndexes()); in rewriteAssigned()
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DLiveIntervals.cpp197 LRCalc->reset(MF, getSlotIndexes(), DomTree, &getVNInfoAllocator()); in computeVirtRegInterval()
270 LRCalc->reset(MF, getSlotIndexes(), DomTree, &getVNInfoAllocator()); in computeRegUnitRange()
627 LRCalc->reset(MF, getSlotIndexes(), DomTree, &getVNInfoAllocator()); in extendToIndices()
1424 SlotIndex InstSlot = LIS.getSlotIndexes()->getInstructionIndex(MI); in findLastUseBefore()
1434 SlotIndexes *Indexes = LIS.getSlotIndexes(); in findLastUseBefore()
1682 LRCalc->reset(MF, getSlotIndexes(), DomTree, &getVNInfoAllocator()); in constructMainRangeFromSubranges()
DLiveRegMatrix.cpp173 return Range.overlaps(UnitRange, CP, *LIS->getSlotIndexes()); in checkRegUnitInterference()
DCalcSpillWeights.cpp288 if (updateLI && li.isZeroLength(LIS.getSlotIndexes()) && in weightCalcHelper()
DRenameIndependentSubregs.cpp304 const SlotIndexes &Indexes = *LIS->getSlotIndexes(); in computeMainRangesFixFlags()
DLiveRangeEdit.cpp177 return LIS.getSlotIndexes()->insertMachineInstrInMaps(*MI, Late).getRegSlot(); in rematerializeAt()
DRegisterCoalescer.cpp956 const SlotIndexes &Indexes = *LIS->getSlotIndexes(); in removeCopyByCommutingDef()
1747 ? LIS->getSlotIndexes()->getIndexBefore(*UseMI) in updateRegDefsUses()
2096 SlotIndexes *Indexes = LIS->getSlotIndexes(); in joinReservedPhysReg()
2379 NewVNInfo(newVNInfo), CP(cp), LIS(lis), Indexes(LIS->getSlotIndexes()), in JoinVals()
3330 *LIS->getSlotIndexes(), *TRI, ComposeSubRegIdx); in mergeSubRangeInto()
3466 const SlotIndexes &Slots = *LIS->getSlotIndexes(); in buildVRegToDbgValueMap()
DLiveDebugVariables.cpp927 RStart = LIS.getSlotIndexes()->getIndexBefore(*Range.first); in computeIntervals()
DLiveInterval.cpp1373 SlotIndex Idx = LIS.getSlotIndexes()->getIndexBefore(*MI); in Distribute()
DMachinePipeliner.cpp350 SlotIndexes &Slots = *getAnalysis<LiveIntervals>().getSlotIndexes(); in preprocessPhiNodes()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DGCNRegPressure.h206 auto &SII = *LIS.getSlotIndexes(); in getLiveRegMap()
DSIFormMemoryClauses.cpp318 SlotIndexes *Ind = LIS->getSlotIndexes(); in runOnMachineFunction()
DGCNSchedStrategy.cpp457 SlotIndexes *Ind = LIS->getSlotIndexes(); in computeBlockPressure()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DLiveIntervals.h211 SlotIndexes *getSlotIndexes() const { in getSlotIndexes() function
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonRegisterInfo.cpp259 const SlotIndexes &Indexes = *LIS.getSlotIndexes(); in shouldCoalesce()
DHexagonExpandCondsets.cpp427 LI.computeSubRangeUndefs(Undefs, LM, *MRI, *LIS->getSlotIndexes()); in updateDeadsInRange()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZInstrInfo.cpp1023 LIS->getSlotIndexes()->getInstructionIndex(MI).getRegSlot(); in foldMemoryOperandImpl()