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Searched refs:has_lsc (Results 1 – 11 of 11) sorted by relevance

/third_party/mesa3d/src/intel/compiler/
Dbrw_eu.h381 assert(devinfo->has_lsc); in brw_urb_fence_desc()
1259 assert(devinfo->has_lsc); in lsc_msg_desc()
1293 assert(devinfo->has_lsc); in lsc_msg_desc_opcode()
1301 assert(devinfo->has_lsc); in lsc_msg_desc_addr_size()
1309 assert(devinfo->has_lsc); in lsc_msg_desc_data_size()
1317 assert(devinfo->has_lsc); in lsc_msg_desc_vect_size()
1326 assert(devinfo->has_lsc); in lsc_msg_desc_cmask()
1335 assert(devinfo->has_lsc); in lsc_msg_desc_transpose()
1343 assert(devinfo->has_lsc); in lsc_msg_desc_cache_ctrl()
1351 assert(devinfo->has_lsc); in lsc_msg_desc_dest_len()
[all …]
Dbrw_eu_validate.c2090 ERROR_IF(!devinfo->has_lsc, "Platform does not support LSC"); in send_descriptor_restrictions()
Dbrw_fs.cpp3875 if (devinfo->has_lsc) { in lower_uniform_pull_constant_loads()
5991 assert(devinfo->has_lsc); in lower_lsc_surface_logical_send()
6913 if (devinfo->has_lsc) { in lower_logical_sends()
6941 if (devinfo->has_lsc) { in lower_logical_sends()
6952 if (devinfo->has_lsc && !compiler->indirect_ubos_use_sampler) in lower_logical_sends()
Dbrw_disasm.c2222 assert(devinfo->has_lsc); in brw_disassemble_inst()
Dbrw_fs_nir.cpp4504 if (devinfo->has_lsc) { in nir_emit_intrinsic()
5781 (nir_dest_bit_size(instr->dest) == 64 && devinfo->has_lsc)); in nir_emit_ssbo_atomic()
Dbrw_eu_emit.c3300 if (devinfo->has_lsc) in brw_memory_fence()
/third_party/mesa3d/src/intel/dev/
Dintel_device_info.h93 bool has_lsc; member
/third_party/mesa3d/src/intel/vulkan/
Danv_device.c1609 features->shaderBufferFloat32AtomicAdd = pdevice->info.has_lsc; in anv_GetPhysicalDeviceFeatures2()
1610 features->shaderBufferFloat64Atomics = pdevice->info.has_lsc; in anv_GetPhysicalDeviceFeatures2()
1629 features->shaderBufferFloat64AtomicMinMax = pdevice->info.has_lsc; in anv_GetPhysicalDeviceFeatures2()
Danv_pipeline.c120 .float32_atomic_add = pdevice->info.has_lsc, in anv_shader_compile_to_nir()
123 .float64_atomic_min_max = pdevice->info.has_lsc, in anv_shader_compile_to_nir()
Danv_nir_apply_pipeline_layout.c727 !state->pdevice->info.has_lsc) in try_lower_direct_buffer_intrinsic()
/third_party/mesa3d/docs/relnotes/
D21.2.0.rst3010 - intel/devinfo: Add a has_lsc bit