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Searched refs:hevc_spec_misc (Results 1 – 7 of 7) sorted by relevance

/third_party/mesa3d/src/gallium/drivers/radeon/
Dradeon_uvd_enc_1_1.c280 enc->enc_pic.hevc_spec_misc.log2_min_luma_coding_block_size_minus3 = in radeon_uvd_enc_spec_misc_hevc()
282 enc->enc_pic.hevc_spec_misc.amp_disabled = !pic->seq.amp_enabled_flag; in radeon_uvd_enc_spec_misc_hevc()
283 enc->enc_pic.hevc_spec_misc.strong_intra_smoothing_enabled = in radeon_uvd_enc_spec_misc_hevc()
285 enc->enc_pic.hevc_spec_misc.constrained_intra_pred_flag = pic->pic.constrained_intra_pred_flag; in radeon_uvd_enc_spec_misc_hevc()
286 enc->enc_pic.hevc_spec_misc.cabac_init_flag = pic->slice.cabac_init_flag; in radeon_uvd_enc_spec_misc_hevc()
287 enc->enc_pic.hevc_spec_misc.half_pel_enabled = 1; in radeon_uvd_enc_spec_misc_hevc()
288 enc->enc_pic.hevc_spec_misc.quarter_pel_enabled = 1; in radeon_uvd_enc_spec_misc_hevc()
291 RADEON_ENC_CS(enc->enc_pic.hevc_spec_misc.log2_min_luma_coding_block_size_minus3); in radeon_uvd_enc_spec_misc_hevc()
292 RADEON_ENC_CS(enc->enc_pic.hevc_spec_misc.amp_disabled); in radeon_uvd_enc_spec_misc_hevc()
293 RADEON_ENC_CS(enc->enc_pic.hevc_spec_misc.strong_intra_smoothing_enabled); in radeon_uvd_enc_spec_misc_hevc()
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Dradeon_vcn_enc_2_0.c168 radeon_enc_code_fixed_bits(enc, enc->enc_pic.hevc_spec_misc.cabac_init_flag, 1); in radeon_enc_slice_header_hevc()
311 radeon_enc_code_ue(enc, enc->enc_pic.hevc_spec_misc.log2_min_luma_coding_block_size_minus3); in radeon_enc_nalu_sps_hevc()
314 6 - (enc->enc_pic.hevc_spec_misc.log2_min_luma_coding_block_size_minus3 + 3)); in radeon_enc_nalu_sps_hevc()
321 radeon_enc_code_fixed_bits(enc, !enc->enc_pic.hevc_spec_misc.amp_disabled, 1); in radeon_enc_nalu_sps_hevc()
334 radeon_enc_code_fixed_bits(enc, enc->enc_pic.hevc_spec_misc.strong_intra_smoothing_enabled, 1); in radeon_enc_nalu_sps_hevc()
368 radeon_enc_code_fixed_bits(enc, enc->enc_pic.hevc_spec_misc.constrained_intra_pred_flag, 1); in radeon_enc_nalu_pps_hevc()
Dradeon_vcn_enc.c166 enc->enc_pic.hevc_spec_misc.log2_min_luma_coding_block_size_minus3 = in radeon_vcn_enc_get_param()
168 enc->enc_pic.hevc_spec_misc.amp_disabled = !pic->seq.amp_enabled_flag; in radeon_vcn_enc_get_param()
169 enc->enc_pic.hevc_spec_misc.strong_intra_smoothing_enabled = in radeon_vcn_enc_get_param()
171 enc->enc_pic.hevc_spec_misc.constrained_intra_pred_flag = in radeon_vcn_enc_get_param()
173 enc->enc_pic.hevc_spec_misc.cabac_init_flag = pic->slice.cabac_init_flag; in radeon_vcn_enc_get_param()
174 enc->enc_pic.hevc_spec_misc.half_pel_enabled = 1; in radeon_vcn_enc_get_param()
175 enc->enc_pic.hevc_spec_misc.quarter_pel_enabled = 1; in radeon_vcn_enc_get_param()
Dradeon_vcn_enc_1_2.c208 RADEON_ENC_CS(enc->enc_pic.hevc_spec_misc.log2_min_luma_coding_block_size_minus3); in radeon_enc_spec_misc_hevc()
209 RADEON_ENC_CS(enc->enc_pic.hevc_spec_misc.amp_disabled); in radeon_enc_spec_misc_hevc()
210 RADEON_ENC_CS(enc->enc_pic.hevc_spec_misc.strong_intra_smoothing_enabled); in radeon_enc_spec_misc_hevc()
211 RADEON_ENC_CS(enc->enc_pic.hevc_spec_misc.constrained_intra_pred_flag); in radeon_enc_spec_misc_hevc()
212 RADEON_ENC_CS(enc->enc_pic.hevc_spec_misc.cabac_init_flag); in radeon_enc_spec_misc_hevc()
213 RADEON_ENC_CS(enc->enc_pic.hevc_spec_misc.half_pel_enabled); in radeon_enc_spec_misc_hevc()
214 RADEON_ENC_CS(enc->enc_pic.hevc_spec_misc.quarter_pel_enabled); in radeon_enc_spec_misc_hevc()
426 radeon_enc_code_ue(enc, enc->enc_pic.hevc_spec_misc.log2_min_luma_coding_block_size_minus3); in radeon_enc_nalu_sps_hevc()
429 6 - (enc->enc_pic.hevc_spec_misc.log2_min_luma_coding_block_size_minus3 + 3)); in radeon_enc_nalu_sps_hevc()
436 radeon_enc_code_fixed_bits(enc, !enc->enc_pic.hevc_spec_misc.amp_disabled, 1); in radeon_enc_nalu_sps_hevc()
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Dradeon_vcn_enc_3_0.c134 radeon_enc_code_fixed_bits(enc, enc->enc_pic.hevc_spec_misc.constrained_intra_pred_flag, 1); in radeon_enc_nalu_pps_hevc()
Dradeon_uvd_enc.h374 ruvd_enc_hevc_spec_misc_t hevc_spec_misc; member
Dradeon_vcn_enc.h463 rvcn_enc_hevc_spec_misc_t hevc_spec_misc; member