Searched refs:hw_state (Results 1 – 4 of 4) sorted by relevance
47 ves->hw_state.hash = _mesa_hash_pointer(ves); in zink_create_vertex_elements_state()108 … ves->hw_state.dynattribs[i].sType = VK_STRUCTURE_TYPE_VERTEX_INPUT_ATTRIBUTE_DESCRIPTION_2_EXT; in zink_create_vertex_elements_state()109 ves->hw_state.dynattribs[i].binding = binding; in zink_create_vertex_elements_state()110 ves->hw_state.dynattribs[i].location = i; in zink_create_vertex_elements_state()111 ves->hw_state.dynattribs[i].format = format; in zink_create_vertex_elements_state()112 assert(ves->hw_state.dynattribs[i].format != VK_FORMAT_UNDEFINED); in zink_create_vertex_elements_state()113 ves->hw_state.dynattribs[i].offset = elem->src_offset; in zink_create_vertex_elements_state()115 ves->hw_state.attribs[i].binding = binding; in zink_create_vertex_elements_state()116 ves->hw_state.attribs[i].location = i; in zink_create_vertex_elements_state()117 ves->hw_state.attribs[i].format = format; in zink_create_vertex_elements_state()[all …]
133 if (!elems->hw_state.num_bindings) in zink_bind_vertex_buffers()136 for (unsigned i = 0; i < elems->hw_state.num_bindings; i++) { in zink_bind_vertex_buffers()144 elems->hw_state.dynbindings[i].stride = vb->stride; in zink_bind_vertex_buffers()153 elems->hw_state.dynbindings[i].stride = 0; in zink_bind_vertex_buffers()159 elems->hw_state.num_bindings, in zink_bind_vertex_buffers()163 elems->hw_state.num_bindings, in zink_bind_vertex_buffers()168 elems->hw_state.num_bindings, elems->hw_state.dynbindings, in zink_bind_vertex_buffers()169 elems->hw_state.num_attribs, elems->hw_state.dynattribs); in zink_bind_vertex_buffers()644 …VKCTX(CmdSetDepthBoundsTestEnableEXT)(batch->state->cmdbuf, dsa_state->hw_state.depth_bounds_test); in zink_draw_vbo()645 if (dsa_state->hw_state.depth_bounds_test) in zink_draw_vbo()[all …]
59 struct zink_vertex_elements_hw_state hw_state; member82 struct zink_rasterizer_hw_state hw_state; member115 struct zink_depth_stencil_alpha_hw_state hw_state; member
1960 bool needs_write = (ctx->dsa_state && ctx->dsa_state->hw_state.depth_write) || in get_render_pass()