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Searched refs:inputs_read (Results 1 – 25 of 94) sorted by relevance

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/third_party/mesa3d/src/mesa/state_tracker/
Dst_atom_array.c77 const GLbitfield inputs_read, in setup_arrays() argument
88 GLbitfield mask = inputs_read & enabled_attribs; in setup_arrays()
89 GLbitfield userbuf_attribs = inputs_read & enabled_user_attribs; in setup_arrays()
122 util_bitcount(inputs_read & BITFIELD_MASK(attr))); in setup_arrays()
164 util_bitcount(inputs_read & BITFIELD_MASK(attr))); in setup_arrays()
200 const GLbitfield inputs_read = vp_variant->vert_attrib_mask; in st_setup_current() local
204 GLbitfield curmask = inputs_read & _mesa_draw_current_bits(ctx); in st_setup_current()
225 util_bitcount(inputs_read & BITFIELD_MASK(attr))); in st_setup_current()
261 const GLbitfield inputs_read = vp_variant->vert_attrib_mask; in st_setup_current_user() local
265 GLbitfield curmask = inputs_read & _mesa_draw_current_bits(ctx); in st_setup_current_user()
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Dst_glsl_to_nir.cpp112 nir->num_inputs = util_bitcount64(nir->info.inputs_read); in st_nir_assign_vs_in_locations()
120 if (nir->info.inputs_read & BITFIELD64_BIT(var->data.location)) { in st_nir_assign_vs_in_locations()
122 util_bitcount64(nir->info.inputs_read & in st_nir_assign_vs_in_locations()
855 shader->Program->info.inputs_read = in st_link_nir()
856 nir_get_single_slot_attribs_mask(nir->info.inputs_read, in st_link_nir()
891 prev_info->outputs_written |= info->inputs_read & in st_link_nir()
893 info->inputs_read |= prev_info->outputs_written & in st_link_nir()
918 prog->info.inputs_read = old_info.inputs_read; in st_link_nir()
Dst_atifs_to_nir.c549 prog->info.inputs_read = 0; in st_init_atifs_prog()
562 … prog->info.inputs_read |= BITFIELD64_BIT(VARYING_SLOT_TEX0 + pass_tex - GL_TEXTURE0_ARB); in st_init_atifs_prog()
569 … prog->info.inputs_read |= BITFIELD64_BIT(VARYING_SLOT_TEX0 + pass_tex - GL_TEXTURE0_ARB); in st_init_atifs_prog()
583 prog->info.inputs_read |= BITFIELD64_BIT(VARYING_SLOT_COL0); in st_init_atifs_prog()
588 prog->info.inputs_read |= BITFIELD64_BIT(VARYING_SLOT_COL1); in st_init_atifs_prog()
596 prog->info.inputs_read |= BITFIELD64_BIT(VARYING_SLOT_FOGC); in st_init_atifs_prog()
/third_party/mesa3d/src/mesa/drivers/dri/i965/
Dbrw_tes.c75 brw_compute_tess_vue_map(&input_vue_map, key->inputs_read, in brw_codegen_tes_prog()
132 uint64_t per_vertex_slots = prog->info.inputs_read; in brw_tes_populate_key()
151 key->inputs_read = per_vertex_slots; in brw_tes_populate_key()
199 key->inputs_read = prog->nir->info.inputs_read; in brw_tes_populate_default_key()
205 key->inputs_read |= tcp->nir->info.outputs_written & in brw_tes_populate_default_key()
Dbrw_wm.c480 (prog->info.inputs_read & (VARYING_BIT_COL0 | VARYING_BIT_COL1)) && in brw_wm_populate_key()
518 if (devinfo->ver < 6 || util_bitcount64(prog->info.inputs_read & in brw_wm_populate_key()
593 if (devinfo->ver < 6 || util_bitcount64(prog->info.inputs_read & in brw_wm_populate_default_key()
595 key->input_slots_valid = prog->info.inputs_read | VARYING_BIT_POS; in brw_wm_populate_default_key()
628 prog->info.inputs_read | VARYING_BIT_POS, in brw_fs_precompile()
Dbrw_link.cpp176 prev_info->outputs_written |= infos[i]->inputs_read & in unify_interfaces()
178 infos[i]->inputs_read |= prev_info->outputs_written & in unify_interfaces()
Dbrw_sf.c131 if (brw->programs[MESA_SHADER_FRAGMENT]->info.inputs_read & in brw_upload_sf_prog()
/third_party/mesa3d/src/mesa/program/
Darbprogparse.c111 program->info.inputs_read = prog.info.inputs_read; in _mesa_parse_arb_fragment_program()
200 program->info.inputs_read = prog.info.inputs_read; in _mesa_parse_arb_vertex_program()
Dprogramopt.c110 vprog->info.inputs_read |= VERT_BIT_POS; in insert_mvp_dp4_code()
211 vprog->info.inputs_read |= VERT_BIT_POS; in insert_mvp_mad_code()
411 fprog->info.inputs_read |= VARYING_BIT_FOGC; in _mesa_append_fog_code()
596 !(prog->info.inputs_read & BITFIELD64_BIT(VARYING_SLOT_POS))) in _mesa_program_fragment_position_to_sysval()
599 prog->info.inputs_read &= ~BITFIELD64_BIT(VARYING_SLOT_POS); in _mesa_program_fragment_position_to_sysval()
/third_party/mesa3d/src/mesa/main/
Dstate.h80 (ctx->VertexProgram._Current->info.inputs_read & VERT_BIT_COLOR1)) in _mesa_need_secondary_color()
85 (ctx->FragmentProgram._Current->info.inputs_read & VARYING_BIT_COL1)) in _mesa_need_secondary_color()
/third_party/mesa3d/src/compiler/nir/
Dnir_lower_passthrough_edgeflags.c42 shader->num_inputs == util_bitcount64(shader->info.inputs_read)); in lower_impl()
83 shader->info.inputs_read |= VERT_BIT_EDGEFLAG; in lower_impl()
Dnir_gather_info.c111 shader->info.inputs_read |= bitfield; in set_io_mask()
520 shader->info.inputs_read |= slot_mask; in gather_intrinsic_info()
585 shader->info.inputs_read |= in gather_intrinsic_info()
863 shader->info.inputs_read = 0; in nir_shader_gather_info()
Dnir_lower_texcoord_replace.c85 b.shader->info.inputs_read |= BITFIELD64_BIT(VARYING_SLOT_PNTC); in nir_lower_texcoord_replace_impl()
/third_party/mesa3d/src/mesa/tnl/
Dt_context.c153 if (!fp || (fp->info.inputs_read & VARYING_BIT_COL0)) { in _tnl_InvalidateState()
162 (fp && fp->info.inputs_read & VARYING_BIT_TEX(i)) || in _tnl_InvalidateState()
169 || (fp != NULL && (fp->info.inputs_read & VARYING_BIT_FOGC) != 0)) { in _tnl_InvalidateState()
/third_party/mesa3d/src/panfrost/lib/
Dpan_shader.c209 info->attribute_count = util_bitcount64(s->info.inputs_read); in GENX()
270 (s->info.inputs_read & (1 << VARYING_SLOT_POS)) || in GENX()
273 s->info.inputs_read & (1 << VARYING_SLOT_PNTC); in GENX()
275 (s->info.inputs_read & (1 << VARYING_SLOT_FACE)) || in GENX()
/third_party/mesa3d/src/mesa/drivers/dri/r200/
Dr200_vertprog.c420 if ((mesa_vp->info.inputs_read & in r200_translate_vertex_program()
426 mesa_vp->info.inputs_read); in r200_translate_vertex_program()
499 if (mesa_vp->info.inputs_read & VERT_BIT_POS) { in r200_translate_vertex_program()
505 if (mesa_vp->info.inputs_read & VERT_BIT_NORMAL) { in r200_translate_vertex_program()
510 if (mesa_vp->info.inputs_read & VERT_BIT_COLOR0) { in r200_translate_vertex_program()
516 if (mesa_vp->info.inputs_read & VERT_BIT_COLOR1) { in r200_translate_vertex_program()
522 if (mesa_vp->info.inputs_read & VERT_BIT_FOG) { in r200_translate_vertex_program()
529 if (mesa_vp->info.inputs_read & VERT_BIT_TEX(i)) { in r200_translate_vertex_program()
538 if (mesa_vp->info.inputs_read & VERT_BIT_TEX(i)) { in r200_translate_vertex_program()
549 if (mesa_vp->info.inputs_read & VERT_BIT_GENERIC(i)) { in r200_translate_vertex_program()
/third_party/mesa3d/src/intel/compiler/
Dbrw_compiler.h363 uint64_t inputs_read; member
1300 GLbitfield64 inputs_read; member
1869 brw_compute_first_urb_slot_required(uint64_t inputs_read, in brw_compute_first_urb_slot_required() argument
1872 if ((inputs_read & (VARYING_BIT_LAYER | VARYING_BIT_VIEWPORT)) == 0) { in brw_compute_first_urb_slot_required()
1875 if (varying > 0 && (inputs_read & BITFIELD64_BIT(varying)) != 0) in brw_compute_first_urb_slot_required()
Dbrw_nir.c195 const unsigned num_inputs = util_bitcount64(nir->info.inputs_read); in brw_nir_lower_vs_inputs()
274 uint64_t inputs_read = nir->info.inputs_read; in brw_nir_lower_vs_inputs() local
277 inputs_read &= ~BITFIELD64_BIT(VERT_ATTRIB_EDGEFLAG); in brw_nir_lower_vs_inputs()
282 slot = util_bitcount64(inputs_read & in brw_nir_lower_vs_inputs()
1491 nir->info.inputs_read = key->outputs_written & in brw_nir_create_passthrough_tcs()
1512 uint64_t varyings = nir->info.inputs_read; in brw_nir_create_passthrough_tcs()
Dbrw_vec4_gs_visitor.cpp612 GLbitfield64 inputs_read = nir->info.inputs_read; in brw_compile_gs() local
614 &c.input_vue_map, inputs_read, in brw_compile_gs()
/third_party/mesa3d/src/gallium/drivers/d3d12/
Dd3d12_compiler.cpp313 return fs && fs->initial->info.inputs_read & VARYING_BIT_POS; in manual_depth_range()
690 uint64_t mask = next->current->nir->info.inputs_read & ~system_generated_in_values; in d3d12_fill_shader_key()
694 key->next_varying_inputs = next->current->nir->info.inputs_read; in d3d12_fill_shader_key()
722 if (sel->is_gs_variant && next && next->initial->info.inputs_read & VARYING_BIT_PRIMITIVE_ID) in d3d12_fill_shader_key()
881 uint64_t mask = key.required_varying_inputs.mask & ~new_nir_variant->info.inputs_read; in select_shader_variant()
1053 nir->info.inputs_read = in d3d12_create_shader()
1057 nir->info.inputs_read = dxil_sort_by_driver_location(nir, nir_var_shader_in); in d3d12_create_shader()
1062 next ? next->current->nir->info.inputs_read : 0); in d3d12_create_shader()
/third_party/mesa3d/src/intel/blorp/
Dblorp.c240 wm_key->input_slots_valid = nir->info.inputs_read | VARYING_BIT_POS; in blorp_compile_fs()
270 vs_prog_data->inputs_read = nir->info.inputs_read; in blorp_compile_vs()
/third_party/mesa3d/src/compiler/glsl/
Dir_set_program_inouts.cpp116 prog->info.inputs_read |= bitfield; in mark()
429 prog->info.inputs_read = 0; in do_set_program_inouts()
/third_party/mesa3d/src/gallium/drivers/v3d/
Dv3d_program.c753 uint64_t inputs_read = s->info.inputs_read; in v3d_update_compiled_vs() local
754 assert(util_bitcount(inputs_read) <= v3d->vtx->num_elements); in v3d_update_compiled_vs()
756 while (inputs_read) { in v3d_update_compiled_vs()
757 int location = u_bit_scan64(&inputs_read); in v3d_update_compiled_vs()
/third_party/mesa3d/src/compiler/
Dshader_info.h152 uint64_t inputs_read; member
/third_party/mesa3d/src/gallium/drivers/iris/
Diris_program.c133 .inputs_read = key->inputs_read, in iris_to_brw_tes_key()
372 nir->info.inputs_read &= ~VERT_BIT_EDGEFLAG; in iris_fix_edge_flags()
1467 *per_vertex_slots = tes->inputs_read; in get_unified_tess_slots()
1706 brw_compute_tess_vue_map(&input_vue_map, key->inputs_read, in iris_compile_tes()
1759 get_unified_tess_slots(ice, &key.inputs_read, &key.patch_inputs_read); in iris_update_compiled_tes()
2627 .inputs_read = info->inputs_read, in iris_create_shader_state()
2650 if (util_bitcount64(info->inputs_read & BRW_FS_VARYING_INPUT_MASK) > 16) { in iris_create_shader_state()
2660 util_bitcount64(info->inputs_read & BRW_FS_VARYING_INPUT_MASK) <= 16; in iris_create_shader_state()
2669 can_rearrange_varyings ? 0 : info->inputs_read | VARYING_BIT_POS, in iris_create_shader_state()

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