Searched refs:isBeforeLegalizeOps (Results 1 – 9 of 9) sorted by relevance
584 !DCI.isBeforeLegalizeOps()); in SimplifyDemandedBits()2089 !DCI.isBeforeLegalizeOps()); in SimplifyDemandedVectorElts()2879 if (DCI.isBeforeLegalizeOps() || in foldSetCCWithAnd()3134 (DCI.isBeforeLegalizeOps() || in SimplifySetCC()3143 (DCI.isBeforeLegalizeOps() || in SimplifySetCC()3400 if (DCI.isBeforeLegalizeOps() || in SimplifySetCC()3459 if (DCI.isBeforeLegalizeOps() || in SimplifySetCC()3580 if ((DCI.isBeforeLegalizeOps() || in SimplifySetCC()3600 if ((DCI.isBeforeLegalizeOps() || in SimplifySetCC()3616 if (!VT.isVector() || DCI.isBeforeLegalizeOps()) { in SimplifySetCC()[all …]
569 if (DCI.isBeforeLegalizeOps()) in performDivRemCombine()678 if (DCI.isBeforeLegalizeOps()) in performSELECTCombine()759 if (DCI.isBeforeLegalizeOps()) in performCMovFPCombine()786 if (DCI.isBeforeLegalizeOps() || !Subtarget.hasExtractInsert()) in performANDCombine()872 if (DCI.isBeforeLegalizeOps() || !Subtarget.hasExtractInsert()) in performORCombine()1060 if (DCI.isBeforeLegalizeOps()) { in performSUBCombine()1075 if (DCI.isBeforeLegalizeOps()) { in performADDCombine()1110 if (DCI.isBeforeLegalizeOps() || !Subtarget.hasCnMips()) in performSHLCombine()
9682 if (DCI.isBeforeLegalizeOps()) in performXorCombine()9750 if (DCI.isBeforeLegalizeOps()) in performMulCombine()9994 if (ResTy == MVT::v4i64 && DCI.isBeforeLegalizeOps()) in performFpToIntCombine()9997 assert((ResTy != MVT::v4i64 || DCI.isBeforeLegalizeOps()) && in performFpToIntCombine()10067 if (ResTy == MVT::v4i64 && DCI.isBeforeLegalizeOps()) in performFDivCombine()10242 if (DCI.isBeforeLegalizeOps()) in performSVEAndCombine()10387 if (DCI.isBeforeLegalizeOps()) in performConcatVectorsCombine()10432 if (DCI.isBeforeLegalizeOps()) in tryCombineFixedPointConvert()10675 if (DCI.isBeforeLegalizeOps()) in performAddSubLongCombine()10724 if (DCI.isBeforeLegalizeOps()) in tryCombineLongOpWithDup()[all …]
1608 !DCI.isBeforeLegalizeOps()); in PerformDAGCombine()1624 !DCI.isBeforeLegalizeOps()); in PerformDAGCombine()
3281 bool isBeforeLegalizeOps() const { return Level < AfterLegalizeVectorOps; } in isBeforeLegalizeOps() function
35323 if (N->getOpcode() == X86ISD::VZEXT_MOVL && !DCI.isBeforeLegalizeOps() && in combineShuffle()36339 if (!DCI.isBeforeLegalizeOps()) in combineCastedMaskArithmetic()37041 if (DCI.isBeforeLegalizeOps()) in combineExtractWithShuffle()37785 !DCI.isBeforeLegalizeOps()); in combineVSelectToBLENDV()37812 !DCI.isBeforeLegalizeOps()); in combineVSelectToBLENDV()37914 if (CondConstantVector && DCI.isBeforeLegalizeOps()) { in combineSelect()38788 if (!DCI.isBeforeLegalize() && !DCI.isBeforeLegalizeOps()) { in combineCMov()40315 if (DCI.isBeforeLegalizeOps()) in combineAnd()40791 if (DCI.isBeforeLegalizeOps()) in combineOr()41269 if (RegVT.is256BitVector() && !DCI.isBeforeLegalizeOps() && in combineLoad()[all …]
1992 if (DCI.isBeforeLegalizeOps() || in PerformDAGCombine()
4088 !DCI.isBeforeLegalizeOps()); in PerformDAGCombine()
9949 !DCI.isBeforeLegalizeOps()); in performCvtF32UByteNCombine()