| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | CallingConvLower.cpp | 72 if (ValAssign.isRegLoc()) { in IsShadowAllocatedReg()
221 HaveRegParm = Locs.back().isRegLoc(); in getRemainingRegParmsForType()
227 if (Locs[I].isRegLoc()) in getRemainingRegParmsForType()
281 bool RegLoc1 = Loc1.isRegLoc(); in resultsCompatible()
282 if (RegLoc1 != Loc2.isRegLoc()) in resultsCompatible()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMCallLowering.cpp | 117 assert(VA.isRegLoc() && "Value shouldn't be assigned to reg"); in assignValueToReg()
155 assert(VA.isRegLoc() && "Value should be in reg"); in assignCustomValue()
156 assert(NextVA.isRegLoc() && "Value should be in reg"); in assignCustomValue()
339 assert(VA.isRegLoc() && "Value shouldn't be assigned to reg"); in assignValueToReg()
379 assert(VA.isRegLoc() && "Value should be in reg"); in assignCustomValue()
380 assert(NextVA.isRegLoc() && "Value should be in reg"); in assignCustomValue()
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| D | ARMFastISel.cpp | 1911 if (VA.isRegLoc() && !VA.needsCustom()) { in ProcessCallArgs()
1917 !VA.isRegLoc() || !ArgLocs[++i].isRegLoc()) in ProcessCallArgs()
1992 if (VA.isRegLoc() && !VA.needsCustom()) { in ProcessCallArgs()
2004 assert(VA.isRegLoc() && NextVA.isRegLoc() && in ProcessCallArgs()
2133 if (!VA.isRegLoc()) in SelectRet()
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| D | ARMISelLowering.cpp | 2067 if (NextVA.isRegLoc()) in PassF64ArgInRegs()
2202 if (VA.isRegLoc()) { in LowerCall()
2215 } else if (VA.isRegLoc()) { in LowerCall()
2686 if (!VA.isRegLoc()) in IsEligibleForTailCallOptimization()
2688 if (!ArgLocs[++i].isRegLoc()) in IsEligibleForTailCallOptimization()
2691 if (!ArgLocs[++i].isRegLoc()) in IsEligibleForTailCallOptimization()
2693 if (!ArgLocs[++i].isRegLoc()) in IsEligibleForTailCallOptimization()
2696 } else if (!VA.isRegLoc()) { in IsEligibleForTailCallOptimization()
2785 assert(VA.isRegLoc() && "Can only return in registers!"); in LowerReturn()
4054 if (VA.isRegLoc()) { in LowerFormalArguments()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | CallLowering.cpp | 305 if (VA.isRegLoc()) { in handleAssignments()
438 if (Loc1.isRegLoc() != Loc2.isRegLoc()) in resultsCompatible()
441 if (Loc1.isRegLoc()) { in resultsCompatible()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/ |
| D | ARCISelLowering.cpp | 285 if (VA.isRegLoc()) { in LowerCall()
378 if (VA.isRegLoc()) { in lowerCallResult()
483 if (VA.isRegLoc()) { in LowerCallArguments()
633 if (VA.isRegLoc()) in LowerReturn()
661 if (!VA.isRegLoc()) in LowerReturn()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | CallingConvLower.h | 145 bool isRegLoc() const { return !isMem; } in isRegLoc() function
150 Register getLocReg() const { assert(isRegLoc()); return Loc; } in getLocReg()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 227 if (VA.isRegLoc()) { in LowerFormalArguments()
348 if (VA.isRegLoc()) in LowerCall()
435 assert(VA.isRegLoc() && "Can only return in registers!"); in LowerReturn()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 235 assert(VA.isRegLoc() && "Can only return in registers!"); in LowerReturn_32()
318 assert(VA.isRegLoc() && "Can only return in registers!"); in LowerReturn_64()
416 if (VA.isRegLoc()) { in LowerFormalArguments_32()
595 if (VA.isRegLoc()) { in LowerFormalArguments_64()
868 if (VA.isRegLoc()) { in LowerCall_32()
872 if (NextVA.isRegLoc()) { in LowerCall_32()
902 if (VA.isRegLoc()) { in LowerCall_32()
1053 if (!VA.isRegLoc() || (ValTy != MVT::f64 && ValTy != MVT::f128)) in fixupVariableFloatArgs()
1165 if (VA.isRegLoc()) { in LowerCall_64()
1200 if (i+1 < ArgLocs.size() && ArgLocs[i+1].isRegLoc() && in LowerCall_64()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 1069 if (VA.isRegLoc()) { in LowerCallResult()
1163 if (VA.isRegLoc()) { in LowerCCCCallTo()
1300 if (VA.isRegLoc()) { in LowerCCCArguments()
1471 if (VA.isRegLoc()) in LowerReturn()
1499 if (!VA.isRegLoc()) in LowerReturn()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| D | RISCVISelLowering.cpp | 1798 assert(VA.isRegLoc() && "Expected register VA assignment"); in unpackF64OnRV32DSoftABI()
1928 else if (VA.isRegLoc()) in LowerFormalArguments()
2172 if (IsF64OnRV32DSoftABI && VA.isRegLoc()) { in LowerCall()
2233 if (VA.isRegLoc()) { in LowerCall()
2411 assert(VA.isRegLoc() && "Can only return in registers!"); in LowerReturn()
2415 assert(VA.isRegLoc() && "Expected return via registers"); in LowerReturn()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
| D | LanaiISelLowering.cpp | 458 if (VA.isRegLoc()) { in LowerCCCArguments()
555 assert(VA.isRegLoc() && "Can only return in registers!"); in LowerReturn()
685 if (VA.isRegLoc()) { in LowerCCCCallTo()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 641 if (VA.isRegLoc()) { in LowerCCCArguments()
763 assert(VA.isRegLoc() && "Can only return in registers!"); in LowerReturn()
849 if (VA.isRegLoc()) { in LowerCCCCallTo()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCFastISel.cpp | 1399 !VA.isRegLoc() || VA.needsCustom()) in processCallArgs()
1507 assert(VA.isRegLoc() && "Can only return in registers!"); in finishCall()
1743 assert(VA.isRegLoc() && "Can only return in registers!"); in SelectRet()
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| D | PPCISelLowering.cpp | 3532 if (VA.isRegLoc()) { in LowerFormalArguments_32SVR4()
5013 assert(VA.isRegLoc() && "Can only return in registers!"); in LowerCallResult()
5733 if (VA.isRegLoc()) { in LowerCall_32SVR4()
7027 if (VA.isRegLoc()) { in LowerFormalArguments_AIX()
7120 if (!VA.isRegLoc()) in LowerCall_AIX()
7173 assert(GPR2.isRegLoc() && GPR2.getValNo() == GPR1.getValNo() && in LowerCall_AIX()
7248 assert(VA.isRegLoc() && "Can only return in registers!"); in LowerReturn()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsCallLowering.cpp | 29 if (VA.isRegLoc()) { in assign()
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| D | MipsFastISel.cpp | 1232 if (VA.isRegLoc() && !VA.needsCustom()) { in processCallArgs()
1723 if (!VA.isRegLoc()) in selectRet()
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| D | MipsISelLowering.cpp | 3283 if (VA.isRegLoc()) { in LowerCall()
3336 if (VA.isRegLoc()) { in LowerCall()
3482 assert(VA.isRegLoc() && "Can only return in registers!"); in LowerCallResult()
3631 bool IsRegLoc = VA.isRegLoc(); in LowerFormalArguments()
3799 assert(VA.isRegLoc() && "Can only return in registers!"); in LowerReturn()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64CallLowering.cpp | 603 if (!ArgLoc.isRegLoc()) { in areCalleeOutgoingArgsTailCallable()
|
| D | AArch64FastISel.cpp | 3114 if (VA.isRegLoc() && !VA.needsCustom()) { in processCallArgs()
3886 if (!VA.isRegLoc()) in selectRet()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.cpp | 1069 if (VA.isRegLoc()) { in LowerFormalArguments()
1402 assert(VA.isRegLoc() && "Can only return in registers!"); in LowerReturn()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 487 if (VA.isRegLoc()) in LowerCall()
781 if (VA.isRegLoc() && ByVal && Flags.getByValSize() <= 8) in LowerFormalArguments()
784 bool InReg = VA.isRegLoc() && in LowerFormalArguments()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86FastISel.cpp | 1213 if (!VA.isRegLoc()) in X86SelectRet()
3404 if (VA.isRegLoc()) { in fastLowerCall()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 1352 if (VA.isRegLoc()) { in LowerFormalArguments()
1478 if (!VA.isRegLoc()) in canUseSiblingCall()
1561 if (VA.isRegLoc()) in LowerCall()
1721 assert(VA.isRegLoc() && "Can only return in registers!"); in LowerReturn()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 2174 assert(VA.isRegLoc() && "Parameter must be in a register!"); in LowerFormalArguments()
2321 assert(VA.isRegLoc() && "Can only return in registers!"); in LowerReturn()
2396 if (VA.isRegLoc()) { in LowerCallResult()
2818 if (VA.isRegLoc()) { in LowerCall()
|