Searched refs:isShiftedMask (Results 1 – 6 of 6) sorted by relevance
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/include/llvm/ADT/ |
| D | APInt.h | 1826 inline bool isShiftedMask(unsigned numBits, const APInt &APIVal) { in isShiftedMask() function
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 2249 static bool isShiftedMask(uint64_t Mask, EVT VT) { in isShiftedMask() function
2293 if (!isShiftedMask(Known.Zero.getZExtValue(), VT)) in tryBitfieldInsertOpFromOrAndImm()
2467 (isShiftedMask(Mask0Imm, VT) || isShiftedMask(Mask1Imm, VT))) { in tryBitfieldInsertOpFromOr()
2472 if (isShiftedMask(Mask0Imm, VT)) { in tryBitfieldInsertOpFromOr()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 100 static bool isShiftedMask(uint64_t I, uint64_t &Pos, uint64_t &Size) { in isShiftedMask() function
802 !isShiftedMask(CN->getZExtValue(), SMPos, SMSize)) in performANDCombine()
884 !isShiftedMask(~CN->getSExtValue(), SMPos0, SMSize0)) in performORCombine()
892 !isShiftedMask(CN->getZExtValue(), SMPos1, SMSize1)) in performORCombine()
1137 !isShiftedMask(CN->getZExtValue(), SMPos, SMSize)) in performSHLCombine()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/ADT/ |
| D | APInt.h | 521 bool isShiftedMask() const { in isShiftedMask() function
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 3164 if (Mask->getAPIntValue().isShiftedMask() && in performSrlCombine()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 10405 } else if (Mask.isShiftedMask()) { in ReduceLoadWidth()
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