/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/MCTargetDesc/ |
D | SystemZMCCodeEmitter.cpp | 188 assert(isUInt<4>(Base) && isUInt<12>(Disp)); in getBDAddr12Encoding() 198 assert(isUInt<4>(Base) && isInt<20>(Disp)); in getBDAddr20Encoding() 209 assert(isUInt<4>(Base) && isUInt<12>(Disp) && isUInt<4>(Index)); in getBDXAddr12Encoding() 220 assert(isUInt<4>(Base) && isInt<20>(Disp) && isUInt<4>(Index)); in getBDXAddr20Encoding() 232 assert(isUInt<4>(Base) && isUInt<12>(Disp) && isUInt<4>(Len)); in getBDLAddr12Len4Encoding() 243 assert(isUInt<4>(Base) && isUInt<12>(Disp) && isUInt<8>(Len)); in getBDLAddr12Len8Encoding() 254 assert(isUInt<4>(Base) && isUInt<12>(Disp) && isUInt<4>(Len)); in getBDRAddr12Encoding() 265 assert(isUInt<4>(Base) && isUInt<12>(Disp) && isUInt<5>(Index)); in getBDVAddr12Encoding()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/AsmParser/ |
D | X86AsmParserCommon.h | 18 (isUInt<16>(Value) && isInt<8>(static_cast<int16_t>(Value))); in isImmSExti16i8Value() 23 (isUInt<32>(Value) && isInt<8>(static_cast<int32_t>(Value))); in isImmSExti32i8Value() 35 return isUInt<8>(Value) || isInt<8>(Value); in isImmUnsignedi8Value() 39 return isUInt<4>(Value); in isImmUnsignedi4Value()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/ |
D | ARCFrameLowering.cpp | 65 if (isUInt<6>(AbsAmount)) in generateStackAdjustment() 139 if (isUInt<6>(VarArgsBytes)) in emitPrologue() 188 TII->get(isUInt<6>(MFI.getStackSize()) ? ARC::ADD_rru6 in emitPrologue() 256 if (isUInt<6>(StackSize)) in emitEpilogue() 284 if (isUInt<6>(MoveAmount)) in emitEpilogue() 299 if (isUInt<6>(4 * StackSlotsUsedByFunclet)) in emitEpilogue() 326 if (isUInt<6>(VarArgsBytes)) in emitEpilogue() 457 if (isUInt<6>(NumBytes)) in emitRegUpdate()
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D | ARCRegisterInfo.cpp | 74 unsigned AddOpc = isUInt<6>(Offset) ? ARC::ADD_rru6 : ARC::ADD_rrlimm; in ReplaceFrameIndex() 115 TII.get(isUInt<6>(Offset) ? ARC::ADD_rru6 : ARC::ADD_rrlimm)) in ReplaceFrameIndex()
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D | ARCExpandPseudos.cpp | 64 isUInt<6>(SI.getOperand(2).getImm()) ? ARC::ADD_rru6 : ARC::ADD_rrlimm; in ExpandStore()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
D | SystemZOperands.td | 339 return isUInt<1>(N->getZExtValue()); 343 return isUInt<2>(N->getZExtValue()); 347 return isUInt<3>(N->getZExtValue()); 351 return isUInt<4>(N->getZExtValue()); 357 return isUInt<4>(N->getZExtValue()); 361 return isUInt<6>(N->getZExtValue()); 369 return isUInt<8>(N->getZExtValue()); 375 return isUInt<12>(N->getZExtValue()); 387 return isUInt<16>(N->getZExtValue()); 480 return isUInt<8>(N->getSExtValue()); [all …]
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D | SystemZTargetTransformInfo.cpp | 53 if (isUInt<32>(Imm.getZExtValue())) in getIntImmCost() 104 if (isUInt<32>(Imm.getZExtValue())) in getIntImmCostInst() 112 if (isUInt<32>(Imm.getZExtValue())) in getIntImmCostInst() 115 if (isUInt<32>(-Imm.getSExtValue())) in getIntImmCostInst() 130 if (isUInt<32>(Imm.getZExtValue())) in getIntImmCostInst() 143 if (isUInt<32>(~Imm.getZExtValue())) in getIntImmCostInst() 205 if (isUInt<32>(Imm.getZExtValue())) in getIntImmCostIntrin() 207 if (isUInt<32>(-Imm.getSExtValue())) in getIntImmCostIntrin() 979 if (isUInt<16>(CI->getZExtValue())) in isFoldableLoad()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/AsmParser/ |
D | PPCAsmParser.cpp | 310 bool isU1Imm() const { return Kind == Immediate && isUInt<1>(getImm()); } in isU1Imm() 311 bool isU2Imm() const { return Kind == Immediate && isUInt<2>(getImm()); } in isU2Imm() 312 bool isU3Imm() const { return Kind == Immediate && isUInt<3>(getImm()); } in isU3Imm() 313 bool isU4Imm() const { return Kind == Immediate && isUInt<4>(getImm()); } in isU4Imm() 314 bool isU5Imm() const { return Kind == Immediate && isUInt<5>(getImm()); } in isU5Imm() 316 bool isU6Imm() const { return Kind == Immediate && isUInt<6>(getImm()); } in isU6Imm() 318 isUInt<6>(getImm()) && in isU6ImmX2() 320 bool isU7Imm() const { return Kind == Immediate && isUInt<7>(getImm()); } in isU7Imm() 322 isUInt<7>(getImm()) && in isU7ImmX4() 324 bool isU8Imm() const { return Kind == Immediate && isUInt<8>(getImm()); } in isU8Imm() [all …]
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/Disassembler/ |
D | RISCVDisassembler.cpp | 172 assert(isUInt<N>(Imm) && "Invalid immediate"); in decodeUImmOperand() 190 assert(isUInt<N>(Imm) && "Invalid immediate"); in decodeSImmOperand() 210 assert(isUInt<N>(Imm) && "Invalid immediate"); in decodeSImmOperandAndLsl1() 221 assert(isUInt<6>(Imm) && "Invalid immediate"); in decodeCLUIImmOperand() 232 assert(isUInt<3>(Imm) && "Invalid immediate"); in decodeFRMArg()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/include/llvm/Support/ |
D | MathExtras.h | 298 isUInt(uint64_t X) { 304 isUInt(uint64_t X) { 309 template <> constexpr inline bool isUInt<8>(uint64_t x) { 312 template <> constexpr inline bool isUInt<16>(uint64_t x) { 315 template <> constexpr inline bool isUInt<32>(uint64_t x) { 328 return isUInt<N + S>(x) && (x % (UINT64_C(1) << S) == 0);
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64CompressJumpTables.cpp | 128 if (isUInt<8>(Span / 4)) { in compressJumpTable() 133 } else if (isUInt<16>(Span / 4)) { in compressJumpTable()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/Utils/ |
D | AMDGPUBaseInfo.cpp | 735 return 0 <= Id && isUInt<ID_WIDTH_>(Id); in isValidHwreg() 739 return 0 <= Offset && isUInt<OFFSET_WIDTH_>(Offset); in isValidHwregOffset() 743 return 0 <= (Width - 1) && isUInt<WIDTH_M1_WIDTH_>(Width - 1); in isValidHwregWidth() 789 return 0 <= MsgId && isUInt<ID_WIDTH_>(MsgId); in isValidMsgId() 812 return 0 <= OpId && isUInt<OP_WIDTH_>(OpId); in isValidMsgOp() 835 return 0 <= StreamId && isUInt<STREAM_ID_WIDTH_>(StreamId); in isValidMsgStream() 1208 if (isInt<16>(Literal) || isUInt<16>(Literal)) { in isInlinableLiteralV216() 1259 isUInt<20>(EncodedOffset) : isUInt<8>(EncodedOffset); in isLegalSMRDImmOffset()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
D | RISCVInstrInfo.cpp | 522 Ok = isUInt<4>(Imm); in verifyInstruction() 525 Ok = isUInt<5>(Imm); in verifyInstruction() 528 Ok = isUInt<12>(Imm); in verifyInstruction() 537 Ok = isUInt<20>(Imm); in verifyInstruction() 544 Ok = isUInt<6>(Imm); in verifyInstruction() 546 Ok = isUInt<5>(Imm); in verifyInstruction()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/ |
D | MathExtras.h | 368 isUInt(uint64_t X) { 374 isUInt(uint64_t X) { 379 template <> constexpr inline bool isUInt<8>(uint64_t x) { 382 template <> constexpr inline bool isUInt<16>(uint64_t x) { 385 template <> constexpr inline bool isUInt<32>(uint64_t x) { 398 return isUInt<N + S>(x) && (x % (UINT64_C(1) << S) == 0);
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/AsmParser/ |
D | RISCVAsmParser.cpp | 402 (isRV64() || (isInt<32>(Imm) || isUInt<32>(Imm))); in isImmXLenLI() 413 return (isRV64() && isUInt<6>(Imm)) || isUInt<5>(Imm); in isUImmLog2XLen() 426 return (isRV64() && isUInt<6>(Imm)) || isUInt<5>(Imm); in isUImmLog2XLenNonZero() 435 return IsConstantImm && isUInt<5>(Imm) && VK == RISCVMCExpr::VK_RISCV_None; in isUImm5() 444 return IsConstantImm && isUInt<5>(Imm) && (Imm != 0) && in isUImm5NonZero() 475 (isUInt<5>(Imm) || (Imm >= 0xfffe0 && Imm <= 0xfffff)) && in isCLUIImm() 574 return isUInt<20>(Imm) && (VK == RISCVMCExpr::VK_RISCV_None || in isUImm20LUI() 594 return isUInt<20>(Imm) && (VK == RISCVMCExpr::VK_RISCV_None || in isUImm20AUIPC() 1096 if (isUInt<12>(Imm)) { in parseCSRSystemRegister()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/IR/ |
D | DataLayout.cpp | 226 if (!isUInt<24>(AddrSpace)) in getAddrSpace() 275 if (!isUInt<24>(AddrSpace)) in parseSpecifier() 353 if (!isUInt<16>(ABIAlign)) in parseSpecifier() 365 if (!isUInt<16>(PrefAlign)) in parseSpecifier() 492 if (!isUInt<24>(bit_width)) in setAlignment()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
D | AVRRegisterInfo.cpp | 182 if (isUInt<6>(Offset)) { in eliminateFrameIndex() 244 assert(isUInt<6>(Offset) && "Offset is out of range"); in eliminateFrameIndex()
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D | AVRFrameLowering.cpp | 129 unsigned Opcode = (isUInt<6>(FrameSize)) ? AVR::SBIWRdK : AVR::SUBIWRdK; in emitPrologue() 200 if (isUInt<6>(FrameSize)) { in emitEpilogue() 393 if (isUInt<6>(Amount)) { in eliminateCallFramePseudoInstr()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/AsmParser/ |
D | AMDGPUAsmParser.cpp | 326 bool isOffset() const { return isImmTy(ImmTyOffset) && isUInt<16>(getImm()); } in isOffset() 327 bool isOffset0() const { return isImmTy(ImmTyOffset0) && isUInt<8>(getImm()); } in isOffset0() 328 bool isOffset1() const { return isImmTy(ImmTyOffset1) && isUInt<8>(getImm()); } in isOffset1() 339 bool isFORMAT() const { return isImmTy(ImmTyFORMAT) && isUInt<8>(getImm()); } in isFORMAT() 2161 if (!isUInt<32>(RegLo) || !isUInt<32>(RegHi) || RegLo > RegHi) in ParseRegRange() 3745 if (!isUInt<ENTRY##_WIDTH>(VALUE)) \ in ParseDirectiveAMDHSAKernel() 3750 if (!isUInt<sizeof(KD.group_segment_fixed_size) * CHAR_BIT>(Val)) in ParseDirectiveAMDHSAKernel() 3754 if (!isUInt<sizeof(KD.private_segment_fixed_size) * CHAR_BIT>(Val)) in ParseDirectiveAMDHSAKernel() 3839 if (!isUInt<1>(Val)) in ParseDirectiveAMDHSAKernel() 3846 if (!isUInt<1>(Val)) in ParseDirectiveAMDHSAKernel() [all …]
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/ADT/ |
D | PointerEmbeddedInt.h | 64 assert((std::is_signed<IntT>::value ? isInt<Bits>(I) : isUInt<Bits>(I)) &&
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
D | HexagonOperands.td | 24 return isUInt<9>(v);
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/Disassembler/ |
D | SystemZDisassembler.cpp | 172 if (!isUInt<N>(Imm)) in decodeUImmOperand() 180 if (!isUInt<N>(Imm)) in decodeSImmOperand() 251 assert(isUInt<N>(Imm) && "Invalid PC-relative offset"); in decodePCDBLOperand()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | SILoadStoreOptimizer.cpp | 775 isUInt<8>(EltOffset0 / 64) && isUInt<8>(EltOffset1 / 64)) { in offsetsCanBeCombined() 783 if (isUInt<8>(EltOffset0) && isUInt<8>(EltOffset1)) { in offsetsCanBeCombined() 793 if ((OffsetDiff % 64 == 0) && isUInt<8>(OffsetDiff / 64)) { in offsetsCanBeCombined() 800 if (isUInt<8>(OffsetDiff)) { in offsetsCanBeCombined() 977 assert((isUInt<8>(NewOffset0) && isUInt<8>(NewOffset1)) && in mergeRead2Pair() 1075 assert((isUInt<8>(NewOffset0) && isUInt<8>(NewOffset1)) && in mergeWrite2Pair()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
D | MipsDSPInstrInfo.td | 14 def immZExt1 : ImmLeaf<i32, [{return isUInt<1>(Imm);}]>; 15 def timmZExt1 : ImmLeaf<i32, [{return isUInt<1>(Imm);}], NOOP_SDNodeXForm, timm>; 16 def immZExt2 : ImmLeaf<i32, [{return isUInt<2>(Imm);}]>; 17 def timmZExt2 : ImmLeaf<i32, [{return isUInt<2>(Imm);}], NOOP_SDNodeXForm, timm>; 18 def immZExt3 : ImmLeaf<i32, [{return isUInt<3>(Imm);}]>; 19 def timmZExt3 : ImmLeaf<i32, [{return isUInt<3>(Imm);}], NOOP_SDNodeXForm, timm>; 20 def immZExt4 : ImmLeaf<i32, [{return isUInt<4>(Imm);}]>; 21 def timmZExt4 : ImmLeaf<i32, [{return isUInt<4>(Imm);}], NOOP_SDNodeXForm, timm>; 22 def immZExt8 : ImmLeaf<i32, [{return isUInt<8>(Imm);}]>; 23 def timmZExt8 : ImmLeaf<i32, [{return isUInt<8>(Imm);}], NOOP_SDNodeXForm, timm>; [all …]
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/Disassembler/ |
D | PPCDisassembler.cpp | 181 assert(isUInt<N>(Imm) && "Invalid immediate"); in decodeUImmOperand() 189 assert(isUInt<N>(Imm) && "Invalid immediate"); in decodeSImmOperand()
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