Searched refs:midgard_reg_mode_16 (Results 1 – 6 of 6) sorted by relevance
137 reg_mode == midgard_reg_mode_16); in validate_expand_mode()142 reg_mode == midgard_reg_mode_16); in validate_expand_mode()147 reg_mode == midgard_reg_mode_16); in validate_expand_mode()159 assert(reg_mode == midgard_reg_mode_16); in validate_expand_mode()163 assert(reg_mode == midgard_reg_mode_16); in validate_expand_mode()379 case midgard_reg_mode_16: in bits_for_mode()530 if (mode == midgard_reg_mode_8 || mode == midgard_reg_mode_16) in print_vec_swizzle()545 midgard_reg_mode_32 : midgard_reg_mode_16, in print_scalar_constant()
115 case midgard_reg_mode_16: in mir_print_constant_component()
309 if (reg_mode == midgard_reg_mode_16 && sz == 16) { in mir_pack_swizzle()312 } else if (reg_mode == midgard_reg_mode_16 && sz == 8) { in mir_pack_swizzle()
255 midgard_reg_mode_16 = 1, enumerator
202 #define M16 midgard_reg_mode_16
2605 return midgard_reg_mode_16; in reg_mode_for_bitsize()