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Searched refs:nir_dest_is_divergent (Results 1 – 4 of 4) sorted by relevance

/third_party/mesa3d/src/amd/compiler/
Daco_instruction_selection_setup.cpp465 nir_dest_is_divergent(alu_instr->dest.dest) ? RegType::vgpr : RegType::sgpr; in init_context()
728 type = nir_dest_is_divergent(intrinsic->dest) ? RegType::vgpr : RegType::sgpr; in init_context()
748 RegType type = nir_dest_is_divergent(tex->dest) ? RegType::vgpr : RegType::sgpr; in init_context()
779 if (nir_dest_is_divergent(phi->dest)) { in init_context()
Daco_instruction_selection.cpp1051 bool use_valu = s_op == aco_opcode::num_opcodes || nir_dest_is_divergent(instr->dest.dest) || in emit_comparison()
5377 if (!nir_dest_is_divergent(instr->dest)) in visit_load_resource()
8408 assert(nir_dest_is_divergent(instr->dest) == expected_divergent); in visit_intrinsic()
8469 if (!nir_dest_is_divergent(instr->dest)) { in visit_intrinsic()
8566 if (!nir_dest_is_divergent(instr->dest)) { in visit_intrinsic()
9842 bool logical = !dst.is_linear() || nir_dest_is_divergent(instr->dest); in visit_phi()
/third_party/mesa3d/src/amd/vulkan/
Dradv_pipeline.c3244 return (bit_size == 8 || !(chip >= GFX8 && nir_dest_is_divergent(alu->dest.dest))) ? 32 in lower_bit_size_callback()
3247 return bit_size == 8 || !nir_dest_is_divergent(alu->dest.dest) ? 32 : 0; in lower_bit_size_callback()
3268 return (bit_size == 8 || !(chip >= GFX8 && nir_dest_is_divergent(alu->dest.dest))) ? 32 in lower_bit_size_callback()
/third_party/mesa3d/src/compiler/nir/
Dnir.h1005 nir_dest_is_divergent(nir_dest dest) in nir_dest_is_divergent() function