Home
last modified time | relevance | path

Searched refs:nir_ieq_imm (Results 1 – 22 of 22) sorted by relevance

/third_party/mesa3d/src/intel/blorp/
Dblorp_nir_builder.h81 return nir_ieq_imm(b, nir_iand(b, nir_channel(b, mcs, 0), in blorp_nir_mcs_is_clear_color()
86 return nir_ieq_imm(b, nir_channel(b, mcs, 0), 0xff); in blorp_nir_mcs_is_clear_color()
89 return nir_ieq_imm(b, nir_channel(b, mcs, 0), ~0); in blorp_nir_mcs_is_clear_color()
93 return nir_iand(b, nir_ieq_imm(b, nir_channel(b, mcs, 0), ~0), in blorp_nir_mcs_is_clear_color()
94 nir_ieq_imm(b, nir_channel(b, mcs, 1), ~0)); in blorp_nir_mcs_is_clear_color()
Dblorp_blit.c675 nir_ssa_def *mcs_zero = nir_ieq_imm(b, nir_channel(b, mcs, 0), 0); in blorp_nir_combine_samples()
678 nir_ieq_imm(b, nir_channel(b, mcs, 1), 0)); in blorp_nir_combine_samples()
1460 nir_bcsel(&b, nir_ieq_imm(&b, comp, 0), in brw_blorp_build_nir_shader()
1462 nir_bcsel(&b, nir_ieq_imm(&b, comp, 1), in brw_blorp_build_nir_shader()
/third_party/mesa3d/src/compiler/nir/
Dnir_opt_idiv_const.c70 return nir_b2i(b, nir_ieq_imm(b, n, int_min), n->bit_size); in build_idiv()
110 return nir_bcsel(b, nir_ieq_imm(b, n, int_min), nir_imm_intN_t(b, 0, n->bit_size), n); in build_irem()
133 nir_ssa_def *is_zero = nir_ieq_imm(b, n, 0); in build_imod()
Dnir_lower_idiv.c111 q = nir_bcsel(bld, nir_ieq_imm(bld, q, 0), in convert_instr()
183 nir_ssa_def *cond = nir_ieq_imm(bld, res, 0); in emit_idiv()
Dnir_lower_int64.c203 return nir_bcsel(b, nir_ieq_imm(b, y, 0), x, in lower_ishl64()
247 return nir_bcsel(b, nir_ieq_imm(b, y, 0), x, in lower_ishr64()
290 return nir_bcsel(b, nir_ieq_imm(b, y, 0), x, in lower_ushr64()
522 nir_iand(b, nir_ieq_imm(b, d_hi, 0), nir_uge(b, n_hi, d_lo)); in lower_udiv64_mod64()
630 return nir_bcsel(b, nir_ieq_imm(b, r, 0), nir_imm_int64(b, 0), in lower_imod64()
Dnir_builtin_builder.h226 return nir_bcsel(b, nir_ieq_imm(b, s, 0), x, y); in nir_select()
Dnir_lower_io.c944 return nir_ieq_imm(b, mode_enum, 0x2); in build_runtime_addr_mode_check()
947 return nir_ieq_imm(b, mode_enum, 0x1); in build_runtime_addr_mode_check()
950 return nir_ior(b, nir_ieq_imm(b, mode_enum, 0x0), in build_runtime_addr_mode_check()
951 nir_ieq_imm(b, mode_enum, 0x3)); in build_runtime_addr_mode_check()
Dnir_lower_tex.c1254 nir_ssa_def_rewrite_uses(&tex->dest.ssa, nir_ieq_imm(b, &fmask_fetch->dest.ssa, 0)); in nir_lower_samples_identical_to_fragment_fetch()
Dnir_builder.h853 nir_ieq_imm(nir_builder *build, nir_ssa_def *x, uint64_t y) in nir_ieq_imm() function
/third_party/mesa3d/src/amd/common/
Dac_nir_lower_esgs_io_to_mem.c159 nir_ssa_def *cond = nir_ieq_imm(b, vertex_src->ssa, i); in gs_per_vertex_input_vertex_offset_gfx6()
179 nir_ssa_def *cond = nir_ieq_imm(b, vertex_src->ssa, i); in gs_per_vertex_input_vertex_offset_gfx9()
Dac_nir_lower_tess_io_to_mem.c513 nir_if *invocation_id_zero = nir_push_if(b, nir_ieq_imm(b, invocation_id, 0)); in hs_emit_write_tess_factors()
536 nir_if *rel_patch_id_zero = nir_push_if(b, nir_ieq_imm(b, rel_patch_id, 0)); in hs_emit_write_tess_factors()
Dac_nir_lower_ngg.c1202 nir_ssa_def *fully_culled = nir_ieq_imm(b, num_live_vertices_in_workgroup, 0u); in add_deferred_attribute_culling()
/third_party/mesa3d/src/panfrost/bifrost/
Dbi_lower_divergent_indirects.c101 nir_push_if(b, nir_ieq_imm(b, lane, i)); in bi_lower_divergent_indirects_impl()
/third_party/mesa3d/src/freedreno/ir3/
Dir3_nir_lower_tess.c716 nir_ssa_def *iid0_cond = nir_ieq_imm(&b, iid, 0); in ir3_nir_lower_tess_ctrl()
985 nir_ieq_imm(&b, nir_load_var(&b, state.emitted_vertex_var), 0); in ir3_nir_lower_gs()
/third_party/mesa3d/src/panfrost/lib/
Dpan_indirect_draw.c605 IF (nir_ieq_imm(b, attrib_idx, PAN_VERTEX_ID)) { in update_vertex_attribs()
620 IF (nir_ieq_imm(b, attrib_idx, PAN_INSTANCE_ID)) { in update_vertex_attribs()
754 nir_bcsel(b, nir_ieq_imm(b, max_instance, 0), in get_invocation()
/third_party/mesa3d/src/compiler/spirv/
Dvtn_cfg.c1000 cond = nir_ior(&b->nb, cond, nir_ieq_imm(&b->nb, sel, *val)); in vtn_switch_case_condition()
1323 cond = nir_ior(&b->nb, cond, nir_ieq_imm(&b->nb, sel, *val)); in vtn_emit_cf_func_unstructured()
/third_party/mesa3d/src/gallium/drivers/r600/sfn/
Dsfn_nir_lower_tess_io.cpp467 nir_push_if(b, nir_ieq_imm(b, &invocation_id->dest.ssa, 0)); in r600_append_tcs_TF_emission()
/third_party/mesa3d/src/freedreno/vulkan/
Dtu_shader.c283 nir_if *nif = nir_push_if(b, nir_ieq_imm(b, base_idx, i)); in lower_ssbo_ubo_intrinsic()
/third_party/mesa3d/src/intel/vulkan/
Danv_nir_apply_pipeline_layout.c546 nir_bcsel(b, nir_ieq_imm(b, res.dyn_offset_base, 0xff), in build_buffer_addr_for_res_index()
/third_party/mesa3d/src/amd/vulkan/
Dradv_shader.c335 def = nir_ieq_imm(&b, intrin->src[0].ssa, 0); in lower_intrinsics()
/third_party/mesa3d/src/compiler/glsl/
Dglsl_to_nir.cpp2284 result = nir_bcsel(&b, nir_ieq_imm(&b, srcs[1], i), in visit()
/third_party/mesa3d/docs/relnotes/
D20.3.0.rst2828 - nir/builder: Add a nir_ieq_imm helper