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Searched refs:nir_imm_false (Results 1 – 13 of 13) sorted by relevance

/third_party/mesa3d/src/intel/compiler/
Dbrw_nir_lower_intersection_shader.c85 nir_store_deref(b, commit, nir_imm_false(b), 0x1); in lower_any_hit_for_intersection()
157 nir_store_var(b, commit, nir_imm_false(b), 0x1); in brw_nir_lower_intersection_shader()
199 nir_store_var(b, commit_tmp, nir_imm_false(b), 0x1); in brw_nir_lower_intersection_shader()
Dbrw_nir_lower_rt_intrinsics.c36 return nir_imm_false(b); in build_leaf_is_procedural()
/third_party/mesa3d/src/amd/common/
Dac_nir_cull.c105 nir_ssa_def *prim_outside_view = nir_imm_false(b); in cull_bbox()
114 nir_ssa_def *prim_is_small_else = nir_imm_false(b); in cull_bbox()
120 prim_is_small = nir_imm_false(b); in cull_bbox()
Dac_nir_lower_ngg.c758 …nir_store_var(b, gs_accepted_var, nir_bcsel(b, fully_culled, nir_imm_false(b), nir_build_has_input… in compact_vertices_after_culling()
/third_party/mesa3d/src/compiler/spirv/
Dvtn_cfg.c944 nir_store_var(&b->nb, switch_fall_var, nir_imm_false(&b->nb), 1); in vtn_emit_branch()
987 nir_ssa_def *any = nir_imm_false(&b->nb); in vtn_switch_case_condition()
998 nir_ssa_def *cond = nir_imm_false(&b->nb); in vtn_switch_case_condition()
1159 nir_store_var(&b->nb, do_cont, nir_imm_false(&b->nb), 1); in vtn_emit_cf_list_structured()
1192 nir_store_var(&b->nb, fall_var, nir_imm_false(&b->nb), 1); in vtn_emit_cf_list_structured()
1321 nir_ssa_def *cond = nir_imm_false(&b->nb); in vtn_emit_cf_func_unstructured()
/third_party/mesa3d/src/microsoft/compiler/
Ddxil_nir_lower_int_samplers.c189 wrap_result_t result = {coords, nir_imm_false(b)}; in wrap_coords()
497 nir_ssa_def *use_border_color = nir_imm_false(b); in lower_sample_to_txf_for_integer_tex_impl()
516 params.wrap[i].use_border_color = nir_imm_false(b); in lower_sample_to_txf_for_integer_tex_impl()
/third_party/mesa3d/src/compiler/nir/
Dnir_lower_discard_or_demote.c69 nir_ssa_def *zero = nir_imm_false(b); in nir_lower_demote_to_discard_instr()
Dnir_lower_returns.c212 nir_store_var(b, state->return_flag, nir_imm_false(b), 1); in lower_returns_in_block()
Dnir_lower_shader_calls.c660 nir_store_reg(&b, resume_reg, nir_imm_false(&b), 1); in duplicate_loop_bodies()
Dnir_builder.h309 nir_imm_false(nir_builder *build) in nir_imm_false() function
674 return nir_bany_inequal(b, src, nir_imm_false(b)); in nir_bany()
Dnir_deref.c1324 deref_is = nir_imm_false(b); in opt_known_deref_mode_is()
/third_party/mesa3d/src/amd/vulkan/
Dradv_query.c193 nir_store_var(&b, available, nir_imm_false(&b), 0x1); in build_occlusion_query_shader()
423 nir_store_var(&b, available, nir_imm_false(&b), 0x1); in build_tfb_query_shader()
547 nir_store_var(&b, available, nir_imm_false(&b), 0x1); in build_timestamp_query_shader()
Dradv_pipeline_rt.c945 nir_store_deref(b, commit, nir_imm_false(b), 0x1); in lower_any_hit_for_intersection()
1022 nir_store_var(b, commit, nir_imm_false(b), 0x1); in nir_lower_intersection_shader()
1041 nir_store_var(b, commit_tmp, nir_imm_false(b), 0x1); in nir_lower_intersection_shader()