| /third_party/mesa3d/src/freedreno/ir3/ |
| D | ir3_nir_lower_tg4_to_tex.c | 39 int offset_index = nir_tex_instr_src_index(tg4, nir_tex_src_offset); in ir3_nir_lower_tg4_to_tex_instr()
65 tex->src[tg4->num_srcs].src_type = nir_tex_src_offset; in ir3_nir_lower_tg4_to_tex_instr()
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| D | ir3_nir_lower_tex_prefetch.c | 168 has_src(tex, nir_tex_src_offset) || has_src(tex, nir_tex_src_ddx) || in lower_tex_prefetch_block()
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| D | ir3_compiler_nir.c | 2423 case nir_tex_src_offset: in emit_tex()
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| /third_party/mesa3d/src/broadcom/compiler/ |
| D | v3d33_tex.c | 115 case nir_tex_src_offset: { in v3d33_vir_emit_tex()
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| D | v3d40_tex.c | 159 case nir_tex_src_offset: { in handle_tex_src()
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| /third_party/mesa3d/src/compiler/nir/ |
| D | nir_lower_tex.c | 140 int offset_index = nir_tex_instr_src_index(tex, nir_tex_src_offset); in lower_offset()
1082 assert(nir_tex_instr_src_index(tex, nir_tex_src_offset) == -1); in lower_tg4_offsets()
1107 src.src_type = nir_tex_src_offset; in lower_tg4_offsets()
1389 nir_tex_instr_src_index(tex, nir_tex_src_offset) >= 0; in nir_lower_tex_block()
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| D | nir_lower_mediump.c | 607 bool is_sint = i == nir_tex_src_offset; in nir_legalize_16bit_sampler_srcs()
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| D | nir_validate.c | 855 case nir_tex_src_offset: in validate_tex_instr()
925 validate_assert(state, !src_type_seen[nir_tex_src_offset]); in validate_tex_instr()
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| D | nir.h | 2058 nir_tex_src_offset, enumerator
2469 case nir_tex_src_offset: in nir_tex_instr_src_type()
2516 if (instr->src[src].src_type == nir_tex_src_offset) { in nir_tex_instr_src_size()
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| D | nir_print.c | 1142 case nir_tex_src_offset: in print_tex_instr()
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| /third_party/mesa3d/src/microsoft/compiler/ |
| D | dxil_nir_lower_int_samplers.c | 490 int offset_index = nir_tex_instr_src_index(tex, nir_tex_src_offset); in lower_sample_to_txf_for_integer_tex_impl()
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| D | nir_to_dxil.c | 4077 case nir_tex_src_offset: in emit_tex()
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| /third_party/mesa3d/src/gallium/drivers/r600/sfn/ |
| D | sfn_emittexinstruction.cpp | 567 case nir_tex_src_offset: in get_inputs()
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| /third_party/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_shader_nir.c | 670 [nir_tex_src_offset] = {true, 32}, in si_late_optimize_16bit_samplers()
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| /third_party/mesa3d/src/gallium/auxiliary/nir/ |
| D | nir_to_tgsi.c | 2214 int tex_offset_src = nir_tex_instr_src_index(instr, nir_tex_src_offset); in ntt_emit_texture()
2989 bool has_offset = nir_tex_instr_src_index(tex, nir_tex_src_offset) >= 0; in nir_to_tgsi_lower_txp()
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| D | tgsi_to_nir.c | 1550 instr->src[src_number].src_type = nir_tex_src_offset; in ttn_tex()
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| /third_party/mesa3d/src/asahi/compiler/ |
| D | agx_compile.c | 803 case nir_tex_src_offset: in agx_emit_tex()
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| /third_party/mesa3d/src/panfrost/bifrost/ |
| D | bifrost_compile.c | 2429 int offs_idx = nir_tex_instr_src_index(instr, nir_tex_src_offset); in bi_emit_texc_offset_ms_index()
2684 case nir_tex_src_offset: in bi_emit_texc()
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| /third_party/mesa3d/src/intel/compiler/ |
| D | brw_vec4_nir.cpp | 2063 case nir_tex_src_offset: in nir_emit_texture()
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| /third_party/mesa3d/src/compiler/glsl/ |
| D | glsl_to_nir.cpp | 2483 instr->src[src_number].src_type = nir_tex_src_offset; in visit()
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| /third_party/mesa3d/src/compiler/spirv/ |
| D | spirv_to_nir.c | 2957 (*p++) = vtn_tex_src(b, w[arg], nir_tex_src_offset); in vtn_handle_texture()
2963 (*p++) = vtn_tex_src(b, w[arg], nir_tex_src_offset); in vtn_handle_texture()
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| /third_party/mesa3d/src/panfrost/midgard/ |
| D | midgard_compile.c | 2396 case nir_tex_src_offset: { in emit_texop_native()
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| /third_party/mesa3d/src/gallium/auxiliary/gallivm/ |
| D | lp_bld_nir.c | 2090 case nir_tex_src_offset: { in visit_tex()
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| /third_party/mesa3d/src/gallium/drivers/nouveau/codegen/ |
| D | nv50_ir_from_nir.cpp | 2968 int offsetIdx = nir_tex_instr_src_index(insn, nir_tex_src_offset); in visit()
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| /third_party/mesa3d/src/gallium/drivers/zink/nir_to_spirv/ |
| D | nir_to_spirv.c | 3131 case nir_tex_src_offset: in emit_tex()
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