| /third_party/mesa3d/src/compiler/nir/ |
| D | nir_opt_idiv_const.c | 35 return nir_ushr_imm(b, n, util_logbase2_64(d)); in build_udiv()
41 n = nir_ushr_imm(b, n, m.pre_shift); in build_udiv()
46 n = nir_ushr_imm(b, n, m.post_shift); in build_udiv()
81 nir_ssa_def *uq = nir_ushr_imm(b, nir_iabs(b, n), util_logbase2_64(abs_d)); in build_idiv()
97 res = nir_iadd(b, res, nir_ushr_imm(b, res, n->bit_size - 1)); in build_idiv()
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| D | nir_lower_ubo_vec4.c | 91 nir_ssa_def *vec4_offset = nir_ushr_imm(b, byte_offset, 4); in nir_lower_ubo_vec4_lower()
163 nir_ssa_def *chan_vec4_offset = nir_ushr_imm(b, chan_byte_offset, 4); in nir_lower_ubo_vec4_lower()
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| D | nir_format_convert.h | 217 dst_chan[i] = nir_iand(b, nir_ushr_imm(b, nir_channel(b, src, src_idx), in nir_format_bitcast_uvec_unmasked()
430 nir_iadd(b, nir_umax(b, nir_ushr_imm(b, maxu, 23), in nir_format_pack_r9g9b9e5()
458 nir_ushr_imm(b, mantissa, 1)); in nir_format_pack_r9g9b9e5()
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| D | nir_lower_bit_size.c | 79 lowered_dst = nir_ushr_imm(bld, lowered_dst, dst_bit_size); in lower_alu_instr()
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| D | nir_builder.h | 935 nir_ushr_imm(nir_builder *build, nir_ssa_def *x, uint32_t y) in nir_ushr_imm() function
953 return nir_ushr_imm(build, x, ffsll(y) - 1); in nir_udiv_imm()
1071 nir_ssa_def *val = nir_ushr_imm(b, src, i * dest_bit_size); in nir_unpack_bits()
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| D | nir_lower_int64.c | 476 carry = nir_ushr_imm(b, tmp, 32); in lower_mul_high64()
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| /third_party/mesa3d/src/amd/common/ |
| D | ac_surface.c | 3043 v = nir_ixor(b, v, nir_iand(b, nir_ushr_imm(b, bits, u_bit_scan(&mask)), one)); in gfx10_nir_meta_addr_from_coord()
3053 nir_ssa_def *xb = nir_ushr_imm(b, x, meta_block_width_log2); in gfx10_nir_meta_addr_from_coord()
3054 nir_ssa_def *yb = nir_ushr_imm(b, y, meta_block_height_log2); in gfx10_nir_meta_addr_from_coord()
3055 nir_ssa_def *pb = nir_ushr_imm(b, meta_pitch, meta_block_width_log2); in gfx10_nir_meta_addr_from_coord()
3087 nir_ssa_def *pitchInBlock = nir_ushr_imm(b, meta_pitch, meta_block_width_log2); in gfx9_nir_meta_addr_from_coord()
3088 nir_ssa_def *sliceSizeInBlock = nir_imul(b, nir_ushr_imm(b, meta_height, meta_block_height_log2), in gfx9_nir_meta_addr_from_coord()
3091 nir_ssa_def *xb = nir_ushr_imm(b, x, meta_block_width_log2); in gfx9_nir_meta_addr_from_coord()
3092 nir_ssa_def *yb = nir_ushr_imm(b, y, meta_block_height_log2); in gfx9_nir_meta_addr_from_coord()
3093 nir_ssa_def *zb = nir_ushr_imm(b, z, meta_block_depth_log2); in gfx9_nir_meta_addr_from_coord()
3113 nir_iand(b, nir_ushr_imm(b, coords[equation->u.gfx9.bit[i].coord[c].dim], in gfx9_nir_meta_addr_from_coord()
[all …]
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| D | ac_nir_lower_ngg.c | 1429 nir_ssa_def *row = nir_ushr_imm(b, out_vtx_idx, 5); in ngg_gs_out_vertex_addr()
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| /third_party/mesa3d/src/panfrost/lib/ |
| D | pan_indirect_draw.c | 461 nir_ssa_def *half_div64 = nir_u2u64(b, nir_ushr_imm(b, div, 1)); in split_div()
792 nir_ishl(b, nir_ushr_imm(b, base, 1), nir_imm_int(b, 5))); in get_padded_count()
879 val = nir_ushr_imm(b, val, shift); in get_instance_size()
904 val = nir_ushr_imm(b, val, shift); in get_instance_size()
1044 nir_ssa_def *data = nir_ushr_imm(b, val, i * 8); in get_index_min_max()
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| D | pan_indirect_dispatch.c | 192 nir_ssa_def *num_wg_x_split = nir_iand_imm(&b, nir_ushr_imm(&b, split, 10), 0x3f); in GENX()
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| /third_party/mesa3d/src/panfrost/vulkan/ |
| D | panvk_vX_meta_copy.c | 461 nir_ushr_imm(&b, nir_channel(&b, rgb, 1), 3), in panvk_meta_copy_img2img_shader()
473 nir_ushr_imm(&b, nir_channel(&b, rg, 0), 5), in panvk_meta_copy_img2img_shader()
476 nir_ushr_imm(&b, nir_channel(&b, rg, 1), 3)); in panvk_meta_copy_img2img_shader()
1026 nir_iand_imm(&b, nir_ushr_imm(&b, texel, 5), BITFIELD_MASK(6)), in panvk_meta_copy_buf2img_shader()
1027 nir_iand_imm(&b, nir_ushr_imm(&b, texel, 11), BITFIELD_MASK(5))); in panvk_meta_copy_buf2img_shader()
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