/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64SVEInstrInfo.td | 518 …1D : sve_mem_64b_gld_vi_64_ptrs<0b1110, "ld1d", uimm5s8, AArch64ld1_gather_imm, nxv2i64>; 519 …FF1D : sve_mem_64b_gld_vi_64_ptrs<0b1111, "ldff1d", uimm5s8, null_frag, nxv2i64>; 535 …defm GLD1D : sve_mem_64b_gld_vs2_64_unscaled<0b1110, "ld1d", AArch64ld1_gather, nxv2i64>; 536 …defm GLDFF1D : sve_mem_64b_gld_vs2_64_unscaled<0b1111, "ldff1d", null_frag, nxv2i64>; 548 …_mem_64b_gld_sv2_64_scaled<0b1110, "ld1d", AArch64ld1_gather_scaled, ZPR64ExtLSL64, nxv2i64>; 549 …_mem_64b_gld_sv2_64_scaled<0b1111, "ldff1d", null_frag, ZPR64ExtLSL64, nxv2i64>; 565 …", AArch64ld1_gather_sxtw, AArch64ld1_gather_uxtw, ZPR64ExtSXTW8, ZPR64ExtUXTW8, nxv2i64>; 566 …1d", null_frag, null_frag, ZPR64ExtSXTW8, ZPR64ExtUXTW8, nxv2i64>; 578 …4ld1_gather_sxtw_scaled, AArch64ld1_gather_uxtw_scaled, ZPR64ExtSXTW64, ZPR64ExtUXTW64, nxv2i64>; 579 …rag, null_frag, ZPR64ExtSXTW64, ZPR64ExtUXTW64, nxv2i64>; [all …]
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D | SVEInstrFormats.td | 581 def : SVE_2_Op_Pat<nxv2i64, op, nxv2i64, nxv2i1, !cast<Instruction>(NAME # _D)>; 826 def _D : sve_int_perm_dup_r<0b11, asm, ZPR64, nxv2i64, GPR64sp, op>; 937 def : SVE_2_Op_Pat<nxv2i64, op, nxv2i64, nxv2i64, !cast<Instruction>(NAME # _D)>; 941 def : SVE_2_Op_Pat<nxv2f64, op, nxv2f64, nxv2i64, !cast<Instruction>(NAME # _D)>; 1000 def : SVE_1_Op_Pat<nxv2i64, op, nxv2i64, !cast<Instruction>(NAME # _D)>; 1057 def : SVE_1_Op_Pat<nxv2i64, op, nxv4i32, !cast<Instruction>(NAME # _D)>; 1087 def : SVE_2_Op_Pat<nxv2i64, op, nxv2i64, i64, !cast<Instruction>(NAME # _D)>; 1196 def : SVE_3_Op_Pat<nxv2i64, op, nxv2i1, nxv2i64, nxv2i64, !cast<Instruction>(NAME # _D)>; 1285 def : SVE_1_Op_Imm_Log_Pat<nxv2i64, op, ZPR64, i64, SVELogicalImm64Pat, !cast<Instruction>(NAME)>; 1369 def : SVE_2_Op_Pat<nxv2i64, op, nxv2i64, nxv2i64, !cast<Instruction>(NAME # _D)>; [all …]
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D | AArch64CallingConvention.td | 77 CCIfType<[nxv16i8, nxv8i16, nxv4i32, nxv2i64, nxv2f16, nxv4f16, nxv8f16, 80 CCIfType<[nxv16i8, nxv8i16, nxv4i32, nxv2i64, nxv2f16, nxv4f16, nxv8f16, 157 CCIfType<[nxv16i8, nxv8i16, nxv4i32, nxv2i64, nxv2f16, nxv4f16, nxv8f16,
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D | AArch64ISelLowering.cpp | 177 addRegisterClass(MVT::nxv2i64, &AArch64::ZPRRegClass); in AArch64TargetLowering() 186 for (auto VT : { MVT::nxv16i8, MVT::nxv8i16, MVT::nxv4i32, MVT::nxv2i64 }) { in AArch64TargetLowering() 198 { MVT::nxv2i8, MVT::nxv2i16, MVT::nxv2i32, MVT::nxv2i64, MVT::nxv4i8, in AArch64TargetLowering() 12347 case MVT::nxv2i64: in getSVEContainerType() 12350 return MVT::nxv2i64; in getSVEContainerType() 12395 Offset = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::nxv2i64, Offset).getValue(0); in performST1ScatterCombine() 12455 Offset = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::nxv2i64, Offset).getValue(0); in performLD1GatherCombine()
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D | AArch64RegisterInfo.td | 863 [nxv16i8, nxv8i16, nxv4i32, nxv2i64,
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/ |
D | MachineValueType.h | 179 nxv2i64 = 113, // n x 2 x i64 enumerator 502 case nxv2i64: in getVectorElementType() 648 case nxv2i64: in getVectorNumElements() 770 case nxv2i64: in getSizeInBits() 1056 if (NumElements == 2) return MVT::nxv2i64; in getScalableVectorVT()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
D | AArch64GenFastISel.inc | 671 case MVT::nxv2i64: return fastEmit_AArch64ISD_DUP_MVT_i64_MVT_nxv2i64_r(Op0, Op0IsKill); 1318 if (RetVT.SimpleTy != MVT::nxv2i64) 1362 case MVT::nxv2i64: return fastEmit_AArch64ISD_REV_MVT_nxv2i64_r(RetVT, Op0, Op0IsKill); 1615 if (RetVT.SimpleTy != MVT::nxv2i64) 1653 if (RetVT.SimpleTy != MVT::nxv2i64) 1729 if (RetVT.SimpleTy != MVT::nxv2i64) 1767 if (RetVT.SimpleTy != MVT::nxv2i64) 5768 if (RetVT.SimpleTy != MVT::nxv2i64) 5781 …case MVT::nxv2i64: return fastEmit_AArch64ISD_TBL_MVT_nxv2i64_rr(RetVT, Op0, Op0IsKill, Op1, Op1Is… 5960 if (RetVT.SimpleTy != MVT::nxv2i64) [all …]
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D | AArch64GenCallingConv.inc | 151 LocVT == MVT::nxv2i64 || 170 LocVT == MVT::nxv2i64 || 1157 LocVT == MVT::nxv2i64 ||
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D | AArch64GenGlobalISel.inc | 10868 // (bitconvert:{ *:[nxv2i64] } ZPR:{ *:[nxv16i8] }:$src) => ZPR:{ *:[nxv2i64] }:$src 10882 // (bitconvert:{ *:[nxv2i64] } ZPR:{ *:[nxv8i16] }:$src) => ZPR:{ *:[nxv2i64] }:$src 10896 // (bitconvert:{ *:[nxv2i64] } ZPR:{ *:[nxv4i32] }:$src) => ZPR:{ *:[nxv2i64] }:$src 10910 // (bitconvert:{ *:[nxv2i64] } ZPR:{ *:[nxv8f16] }:$src) => ZPR:{ *:[nxv2i64] }:$src 10924 // (bitconvert:{ *:[nxv2i64] } ZPR:{ *:[nxv4f32] }:$src) => ZPR:{ *:[nxv2i64] }:$src 10938 // (bitconvert:{ *:[nxv2i64] } ZPR:{ *:[nxv2f64] }:$src) => ZPR:{ *:[nxv2i64] }:$src 10994 // (bitconvert:{ *:[nxv2f64] } ZPR:{ *:[nxv2i64] }:$src) => ZPR:{ *:[nxv2f64] }:$src 11810 // (bitconvert:{ *:[nxv4i32] } ZPR:{ *:[nxv2i64] }:$src) => ZPR:{ *:[nxv4i32] }:$src 11908 // (bitconvert:{ *:[nxv4f32] } ZPR:{ *:[nxv2i64] }:$src) => ZPR:{ *:[nxv4f32] }:$src 12543 // (bitconvert:{ *:[nxv8i16] } ZPR:{ *:[nxv2i64] }:$src) => ZPR:{ *:[nxv8i16] }:$src [all …]
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D | AArch64GenRegisterInfo.inc | 5187 …/* 39 */ MVT::nxv16i8, MVT::nxv8i16, MVT::nxv4i32, MVT::nxv2i64, MVT::nxv2f16, MVT::nxv4f16, MVT::…
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
D | ValueTypes.cpp | 283 case MVT::nxv2i64: in getTypeForEVT()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
D | ValueTypes.td | 145 def nxv2i64 : ValueType<128, 113>; // n x 2 x i64 vector value
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/ |
D | IntrinsicsAArch64.td | 765 def llvm_nxv2i64_ty : LLVMType<nxv2i64>;
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