Searched refs:orig_instr (Results 1 – 3 of 3) sorted by relevance
| /third_party/mesa3d/src/compiler/nir/ |
| D | nir_lower_indirect_derefs.c | 29 emit_load_store_deref(nir_builder *b, nir_intrinsic_instr *orig_instr,
35 emit_indirect_load_store_deref(nir_builder *b, nir_intrinsic_instr *orig_instr, in emit_indirect_load_store_deref() argument
43 emit_load_store_deref(b, orig_instr, in emit_indirect_load_store_deref()
55 emit_indirect_load_store_deref(b, orig_instr, parent, deref_arr, in emit_indirect_load_store_deref()
58 emit_indirect_load_store_deref(b, orig_instr, parent, deref_arr, in emit_indirect_load_store_deref()
68 emit_load_store_deref(nir_builder *b, nir_intrinsic_instr *orig_instr, in emit_load_store_deref() argument
79 emit_indirect_load_store_deref(b, orig_instr, parent, deref_arr, in emit_load_store_deref()
93 nir_intrinsic_instr_create(b->shader, orig_instr->intrinsic); in emit_load_store_deref()
94 load->num_components = orig_instr->num_components; in emit_load_store_deref()
100 i < nir_intrinsic_infos[orig_instr->intrinsic].num_srcs; i++) in emit_load_store_deref()
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| /third_party/mesa3d/src/amd/compiler/ |
| D | aco_opt_value_numbering.cpp | 395 Instruction* orig_instr = res.first->first; in process_block() local
396 assert(instr->definitions.size() == orig_instr->definitions.size()); in process_block()
401 assert(instr->definitions[i].regClass() == orig_instr->definitions[i].regClass()); in process_block()
403 ctx.renames[instr->definitions[i].tempId()] = orig_instr->definitions[i].getTemp(); in process_block()
405 orig_instr->definitions[i].setPrecise(true); in process_block()
411 orig_instr->definitions[i].setNUW(true); in process_block()
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| /third_party/mesa3d/src/freedreno/ir3/ |
| D | ir3_sched.c | 845 split_instr(struct ir3_sched_ctx *ctx, struct ir3_instruction *orig_instr) in split_instr() argument
847 struct ir3_instruction *new_instr = ir3_instr_clone(orig_instr); in split_instr()
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