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Searched refs:param_exports (Results 1 – 6 of 6) sorted by relevance

/third_party/mesa3d/src/amd/vulkan/
Dradv_shader_info.c681 outinfo->param_exports = 0; in radv_nir_shader_info_pass()
691 outinfo->vs_output_param_offset[idx] = outinfo->param_exports++; in radv_nir_shader_info_pass()
698 outinfo->vs_output_param_offset[VARYING_SLOT_LAYER] = outinfo->param_exports++; in radv_nir_shader_info_pass()
703 outinfo->vs_output_param_offset[VARYING_SLOT_PRIMITIVE_ID] = outinfo->param_exports++; in radv_nir_shader_info_pass()
Dradv_shader.h193 uint8_t param_exports; member
Dradv_pipeline.c4423 nparams = MAX2(outinfo->param_exports, 1); in radv_pipeline_generate_hw_vs()
4427 spi_vs_out_config |= S_0286C4_NO_PC_EXPORT(outinfo->param_exports == 0); in radv_pipeline_generate_hw_vs()
4545 nparams = MAX2(outinfo->param_exports, 1); in radv_pipeline_generate_hw_ngg()
4548 S_0286C4_VS_EXPORT_COUNT(nparams - 1) | S_0286C4_NO_PC_EXPORT(outinfo->param_exports == 0)); in radv_pipeline_generate_hw_ngg()
4634 if (outinfo->param_exports > 4) in radv_pipeline_generate_hw_ngg()
4636 else if (outinfo->param_exports > 2) in radv_pipeline_generate_hw_ngg()
Dradv_nir_to_llvm.c2249 VARYING_SLOT_MAX, 0, &outinfo->param_exports); in ac_nir_eliminate_const_vs_outputs()
/third_party/mesa3d/src/gallium/drivers/radeonsi/
Dsi_shader_llvm_vs.c584 struct ac_export_args param_exports[32]; in si_llvm_build_vs_exports() local
585 si_prepare_param_exports(ctx, outputs, noutput, param_exports); in si_llvm_build_vs_exports()
757 ac_build_export(&ctx->ac, &param_exports[i]); in si_llvm_build_vs_exports()
/third_party/mesa3d/src/amd/compiler/
Daco_instruction_selection_setup.cpp265 ctx->program->early_rast = ctx->program->chip_class >= GFX10 && outinfo->param_exports == 0; in setup_vs_output_info()