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Searched refs:push_ranges (Results 1 – 9 of 9) sorted by relevance

/third_party/mesa3d/src/intel/vulkan/
Danv_nir_compute_push_layout.c41 memset(map->push_ranges, 0, sizeof(map->push_ranges)); in anv_nir_compute_push_layout()
209 map->push_ranges[n++] = push_constant_range; in anv_nir_compute_push_layout()
234 map->push_ranges[n++] = (struct anv_push_range) { in anv_nir_compute_push_layout()
259 map->push_ranges[0] = push_constant_range; in anv_nir_compute_push_layout()
266 _mesa_sha1_compute(map->push_ranges, in anv_nir_compute_push_layout()
267 sizeof(map->push_ranges), in anv_nir_compute_push_layout()
282 bind_map_push_size += map->push_ranges[i].length; in anv_nir_validate_push_layout()
Danv_pipeline_cache.c206 blob_write_bytes(blob, shader->bind_map.push_ranges, in anv_shader_bin_write_to_blob()
207 sizeof(shader->bind_map.push_ranges)); in anv_shader_bin_write_to_blob()
257 blob_copy_bytes(blob, bind_map.push_ranges, sizeof(bind_map.push_ranges)); in anv_shader_bin_create_from_blob()
Danv_pipeline.c1238 push_size += stage->bind_map.push_ranges[i].length; in anv_pipeline_add_executable()
1242 if (stage->bind_map.push_ranges[i].length == 0) in anv_pipeline_add_executable()
1246 stage->bind_map.push_ranges[i].length * 32); in anv_pipeline_add_executable()
1248 switch (stage->bind_map.push_ranges[i].set) { in anv_pipeline_add_executable()
1259 stage->bind_map.push_ranges[i].index, in anv_pipeline_add_executable()
1260 stage->bind_map.push_ranges[i].start * 32); in anv_pipeline_add_executable()
1268 stage->bind_map.push_ranges[i].start * 32); in anv_pipeline_add_executable()
1276 stage->bind_map.push_ranges[i].set, in anv_pipeline_add_executable()
1277 stage->bind_map.push_ranges[i].index, in anv_pipeline_add_executable()
1278 stage->bind_map.push_ranges[i].start * 32); in anv_pipeline_add_executable()
DgenX_cmd_buffer.c3235 const struct anv_push_range *range = &bind_map->push_ranges[i]; in cmd_buffer_emit_push_constant()
3253 if (bind_map->push_ranges[0].length > 0) { in cmd_buffer_emit_push_constant()
3255 assert(bind_map->push_ranges[0].set == in cmd_buffer_emit_push_constant()
3259 c.ConstantBody.ReadLength[0] = bind_map->push_ranges[0].length; in cmd_buffer_emit_push_constant()
3263 assert(bind_map->push_ranges[1].length == 0); in cmd_buffer_emit_push_constant()
3264 assert(bind_map->push_ranges[2].length == 0); in cmd_buffer_emit_push_constant()
3265 assert(bind_map->push_ranges[3].length == 0); in cmd_buffer_emit_push_constant()
3316 const struct anv_push_range *range = &bind_map->push_ranges[i]; in cmd_buffer_emit_push_constant_all()
3356 const struct anv_push_range *range = &bind_map->push_ranges[i]; in cmd_buffer_flush_push_constants()
3402 const struct anv_push_range *range = &bind_map->push_ranges[i]; in cmd_buffer_flush_push_constants()
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Danv_cmd_buffer.c1173 const struct anv_push_range *range = &pipeline->cs->bind_map.push_ranges[0]; in anv_cmd_buffer_cs_push_constants()
Danv_private.h3424 struct anv_push_range push_ranges[4]; member
/third_party/mesa3d/src/asahi/compiler/
Dagx_uniforms.c38 for (unsigned i = 0; i < ctx->out->push_ranges; ++i) { in agx_indexed_sysval()
49 assert(ctx->out->push_ranges < AGX_MAX_PUSH_RANGES); in agx_indexed_sysval()
54 ctx->out->push[ctx->out->push_ranges++] = (struct agx_push) { in agx_indexed_sysval()
Dagx_compile.h88 unsigned push_ranges; member
/third_party/mesa3d/src/gallium/drivers/asahi/
Dagx_state.c1048 for (unsigned i = 0; i < cs->info.push_ranges; ++i) { in agx_build_pipeline()