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Searched refs:ra_regs (Results 1 – 19 of 19) sorted by relevance

/third_party/mesa3d/src/util/
Dregister_allocate.h40 struct ra_regs;
53 struct ra_regs *ra_alloc_reg_set(void *mem_ctx, unsigned int count,
55 void ra_set_allocate_round_robin(struct ra_regs *regs);
56 struct ra_class *ra_alloc_reg_class(struct ra_regs *regs);
57 struct ra_class *ra_alloc_contig_reg_class(struct ra_regs *regs, int contig_len);
59 void ra_add_reg_conflict(struct ra_regs *regs,
61 void ra_add_transitive_reg_conflict(struct ra_regs *regs,
65 ra_add_transitive_reg_pair_conflict(struct ra_regs *regs,
68 void ra_make_reg_conflicts_transitive(struct ra_regs *regs, unsigned int reg);
70 struct ra_class *ra_get_class_from_index(struct ra_regs *regs, unsigned int c);
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Dregister_allocate_internal.h46 struct ra_regs { struct
57 struct ra_regs *regset; argument
130 struct ra_regs *regs;
Dregister_allocate.c91 struct ra_regs *
95 struct ra_regs *regs; in ra_alloc_reg_set()
97 regs = rzalloc(mem_ctx, struct ra_regs); in ra_alloc_reg_set()
126 ra_set_allocate_round_robin(struct ra_regs *regs) in ra_set_allocate_round_robin()
132 ra_add_conflict_list(struct ra_regs *regs, unsigned int r1, unsigned int r2) in ra_add_conflict_list()
143 ra_add_reg_conflict(struct ra_regs *regs, unsigned int r1, unsigned int r2) in ra_add_reg_conflict()
160 ra_add_transitive_reg_conflict(struct ra_regs *regs, in ra_add_transitive_reg_conflict()
179 ra_add_transitive_reg_pair_conflict(struct ra_regs *regs, in ra_add_transitive_reg_pair_conflict()
204 ra_make_reg_conflicts_transitive(struct ra_regs *regs, unsigned int r) in ra_make_reg_conflicts_transitive()
218 ra_alloc_reg_class(struct ra_regs *regs) in ra_alloc_reg_class()
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Dregister_allocate_test.cpp49 thumb_checks(struct ra_regs *regs, unsigned reg32_base, unsigned reg64_base) in thumb_checks()
88 struct ra_regs *regs = ra_alloc_reg_set(mem_ctx, 100, true); in TEST_F()
128 struct ra_regs *regs = ra_alloc_reg_set(mem_ctx, 16, true); in TEST_F()
152 struct ra_regs *regs = ra_alloc_reg_set(mem_ctx, 16, true); in TEST_F()
173 struct ra_regs *regs = ra_alloc_reg_set(mem_ctx, base_regs, true); in TEST_F()
/third_party/mesa3d/src/gallium/drivers/lima/ir/
Dlima_ir.h51 struct ra_regs;
62 struct ra_regs *ra,
64 struct ra_regs *ppir_regalloc_init(void *mem_ctx);
/third_party/mesa3d/src/gallium/drivers/r300/compiler/
Dradeon_regalloc.h29 struct ra_regs;
55 struct ra_regs *regs;
Dradeon_pair_regalloc.c497 struct ra_regs * regs, in add_register_conflicts()
/third_party/mesa3d/src/gallium/drivers/lima/
Dlima_screen.h55 struct ra_regs;
84 struct ra_regs *pp_ra;
/third_party/mesa3d/src/gallium/drivers/etnaviv/
Detnaviv_compiler_nir_ra.c84 struct ra_regs *
87 struct ra_regs *regs = ra_alloc_reg_set(mem_ctx, ETNA_MAX_TEMPS * in etna_ra_setup()
119 struct ra_regs *regs = compiler->regs; in etna_ra_assign()
Detnaviv_compiler.h54 struct ra_regs *regs;
Detnaviv_compiler_nir.h323 struct ra_regs *
/third_party/mesa3d/src/intel/compiler/
Dbrw_compiler.h37 struct ra_regs;
47 struct ra_regs *regs;
57 struct ra_regs *regs;
Dbrw_fs_reg_allocate.cpp121 struct ra_regs *regs = ra_alloc_reg_set(compiler, BRW_MAX_GRF, false); in brw_alloc_reg_set()
/third_party/mesa3d/src/gallium/drivers/lima/ir/pp/
Dppir.h357 struct ra_regs;
373 struct ra_regs *ra;
Dregalloc.c52 struct ra_regs *ppir_regalloc_init(void *mem_ctx) in ppir_regalloc_init()
54 struct ra_regs *ret = ra_alloc_reg_set(mem_ctx, PPIR_REG_COUNT, false); in ppir_regalloc_init()
Dnir.c878 struct ra_regs *ra, in ppir_compile_nir()
/third_party/mesa3d/src/gallium/drivers/lima/standalone/
Dlima_compiler_cmdline.c236 struct ra_regs *ra = ppir_regalloc_init(NULL); in main()
/third_party/mesa3d/src/gallium/drivers/vc4/
Dvc4_context.h336 struct ra_regs *regs;
/third_party/mesa3d/src/broadcom/compiler/
Dv3d_compiler.h569 struct ra_regs *regs;