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Searched refs:raddr_a (Results 1 – 9 of 9) sorted by relevance

/third_party/mesa3d/src/gallium/drivers/vc4/kernel/
Dvc4_validate_shaders.c117 uint32_t raddr_a = QPU_GET_FIELD(inst, QPU_RADDR_A); in raddr_add_a_to_live_reg_index() local
121 return raddr_a; in raddr_add_a_to_live_reg_index()
187 uint32_t raddr_a = QPU_GET_FIELD(inst, QPU_RADDR_A); in check_tmu_write() local
235 if (!(add_b == QPU_MUX_A && raddr_a == QPU_R_UNIF) && in check_tmu_write()
243 if (raddr_a == QPU_R_UNIF || (sig != QPU_SIG_SMALL_IMM && in check_tmu_write()
309 u32 raddr_a = QPU_GET_FIELD(inst, QPU_RADDR_A); in validate_uniform_address_write() local
363 if (!(add_b == QPU_MUX_A && raddr_a == QPU_R_UNIF) && in validate_uniform_address_write()
478 uint32_t raddr_a = QPU_GET_FIELD(inst, QPU_RADDR_A); in track_live_clamps() local
531 if (!(add_b == QPU_MUX_A && raddr_a == QPU_R_UNIF) && in track_live_clamps()
594 uint32_t raddr_a = QPU_GET_FIELD(inst, QPU_RADDR_A); in check_instruction_reads() local
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/third_party/mesa3d/src/broadcom/compiler/
Dqpu_schedule.c158 add_read_dep(state, state->last_rf[n->inst->qpu.raddr_a], n); in process_mux_deps()
610 inst->raddr_a == waddr) in qpu_instruction_uses_rf()
755 raddrs_used |= (1ll << a->raddr_a); in qpu_raddrs_used()
759 raddrs_used |= (1ll << b->raddr_a); in qpu_raddrs_used()
798 int raddr_a = ffsll(raddrs_used) - 1; in qpu_merge_raddrs() local
799 raddrs_used &= ~(1ll << raddr_a); in qpu_merge_raddrs()
800 result->raddr_a = raddr_a; in qpu_merge_raddrs()
804 raddr_a == add_instr->raddr_b) { in qpu_merge_raddrs()
813 raddr_a == mul_instr->raddr_b) { in qpu_merge_raddrs()
828 raddr_b == add_instr->raddr_a) { in qpu_merge_raddrs()
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Dvir_to_qpu.c113 instr->raddr_a = src.index; in set_src()
116 if (instr->raddr_a == src.index) { in set_src()
159 raddr = qinst->qpu.raddr_a; in is_no_op_mov()
Dvir_dump.c330 fprintf(stderr, " rf%d", instr->branch.raddr_a); in vir_dump_inst()
349 fprintf(stderr, ", rf%d", instr->branch.raddr_a); in vir_dump_inst()
/third_party/mesa3d/src/broadcom/qpu/
Dqpu_disasm.c63 append(disasm, "rf%d", instr->raddr_a); in v3d_qpu_disasm_raddr()
291 append(disasm, " rf%d", instr->branch.raddr_a); in v3d_qpu_disasm_branch()
310 append(disasm, ", rf%d", instr->branch.raddr_a); in v3d_qpu_disasm_branch()
Dqpu_instr.h366 uint8_t raddr_a; member
382 uint8_t raddr_a; member
Dqpu_pack.c1337 instr->raddr_a = QPU_GET_FIELD(packed_instr, V3D_QPU_RADDR_A); in v3d_qpu_instr_unpack_alu()
1378 instr->branch.raddr_a = QPU_GET_FIELD(packed_instr, in v3d_qpu_instr_unpack_branch()
1424 *packed_instr |= QPU_SET_FIELD(instr->raddr_a, V3D_QPU_RADDR_A); in v3d_qpu_instr_pack_alu()
1504 *packed_instr |= QPU_SET_FIELD(instr->branch.raddr_a, in v3d_qpu_instr_pack_branch()
/third_party/mesa3d/src/gallium/drivers/vc4/
Dvc4_qpu_schedule.c330 uint32_t raddr_a = QPU_GET_FIELD(inst, QPU_RADDR_A); in calculate_deps() local
339 process_raddr_deps(state, n, raddr_a, true); in calculate_deps()
456 uint32_t raddr_a = QPU_GET_FIELD(inst, QPU_RADDR_A); in reads_too_soon_after_write() local
472 raddr_a < 32 && in reads_too_soon_after_write()
473 scoreboard->last_waddr_a == raddr_a) || in reads_too_soon_after_write()
Dvc4_qpu.c290 uint32_t raddr_a = QPU_GET_FIELD(inst, QPU_RADDR_A); in qpu_num_sf_accesses() local
300 if (raddr_a == QPU_R_MUTEX_ACQUIRE) in qpu_num_sf_accesses()