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Searched refs:radv_image_is_tc_compat_htile (Results 1 – 7 of 7) sorted by relevance

/third_party/mesa3d/src/amd/vulkan/
Dradv_image.c756 } else if (!disable_compression && radv_image_is_tc_compat_htile(image)) { in si_set_mutable_tex_desc_fields()
1056 radv_image_is_tc_compat_htile(image)) { in si_make_texture_descriptor()
1343 if (radv_image_is_tc_compat_htile(image) && in radv_image_alloc_values()
1384 if (radv_image_is_tc_compat_htile(image) && overlap) { in radv_image_is_pipe_misaligned()
2091 return radv_image_is_tc_compat_htile(image) || in radv_layout_is_htile_compressed()
2105 if (radv_image_is_tc_compat_htile(image) && queue_mask & (1u << RADV_QUEUE_GENERAL) && in radv_layout_is_htile_compressed()
2112 if (radv_image_is_tc_compat_htile(image) || in radv_layout_is_htile_compressed()
2124 return radv_image_is_tc_compat_htile(image); in radv_layout_is_htile_compressed()
Dradv_private.h2101 radv_image_is_tc_compat_htile(const struct radv_image *image) in radv_image_is_tc_compat_htile() function
2120 return !vk_format_has_stencil(image->vk_format) && !radv_image_is_tc_compat_htile(image); in radv_image_tile_stencil_disabled()
2226 radv_image_is_tc_compat_htile(image) && in radv_image_get_iterate256()
Dradv_meta_copy.c94 if (!radv_dcc_enabled(image, subres->mipLevel) && !(radv_image_is_tc_compat_htile(image))) in blit_surf_for_image_level_layer()
Dradv_meta_decompress.c622 assert(radv_image_is_tc_compat_htile(image)); in radv_expand_depth_stencil_compute()
Dradv_meta_clear.c661 if (radv_image_is_tc_compat_htile(iview->image) && in depth_view_can_fast_clear()
987 if (radv_image_is_tc_compat_htile(iview->image) && in radv_can_fast_clear_depth()
Dradv_device.c6810 assert(radv_image_is_tc_compat_htile(iview->image)); in radv_calc_decompress_on_z_planes()
6948 if (radv_image_is_tc_compat_htile(iview->image)) { in radv_initialise_ds_surface()
6991 ds->db_depth_info = S_02803C_ADDR5_SWIZZLE_MASK(!radv_image_is_tc_compat_htile(iview->image)); in radv_initialise_ds_surface()
7043 if (radv_image_is_tc_compat_htile(iview->image)) { in radv_initialise_ds_surface()
Dradv_cmd_buffer.c1844 !radv_image_is_tc_compat_htile(image)) in radv_update_zrange_precision()
2128 if (radv_image_is_tc_compat_htile(image) && (aspects & VK_IMAGE_ASPECT_DEPTH_BIT)) { in radv_update_ds_clear_metadata()
7336 if (radv_image_is_tc_compat_htile(image) && (range->aspectMask & VK_IMAGE_ASPECT_DEPTH_BIT)) { in radv_initialize_htile()