Searched refs:reg_v0 (Results 1 – 3 of 3) sorted by relevance
/third_party/mesa3d/src/amd/compiler/tests/ |
D | test_regalloc.cpp | 193 PhysReg reg_v0{256}; variable 197 Temp tmp = bld.pseudo(aco_opcode::p_unit_test, bld.def(v1.as_linear(), reg_v0)); 201 bld.pseudo(aco_opcode::p_unit_test, Definition(reg_v0, v1)); 272 PhysReg reg_v0{256}; variable 276 Temp lin_tmp = bld.pseudo(aco_opcode::p_unit_test, bld.def(v1.as_linear(), reg_v0));
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D | test_optimizer_postRA.cpp | 30 PhysReg reg_v0(256); 41 startpgm->definitions[0].setFixed(reg_v0); 52 Operand(v_in, reg_v0)); 69 Operand(v_in, reg_v0)); 86 Operand(v_in, reg_v0)); 119 Operand(v_in, reg_v0)); 290 PhysReg reg_v0(256); variable 390 Temp tmp11_2 = bld.vop1(aco_opcode::v_mov_b32, bld.def(v1, reg_v0), Operand::c32(0)); 392 writeout(11, Operand(res11, reg_v2), Operand(tmp11_2, reg_v0));
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D | test_to_hw_instr.cpp | 710 PhysReg reg_v0{256}; variable 719 Definition(reg_v0, v1_linear), Definition(reg_v1, v1_linear), 720 Operand(reg_v1, v1_linear), Operand(reg_v0, v1_linear));
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