Searched refs:res11 (Results 1 – 8 of 8) sorted by relevance
| /third_party/mindspore/mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/intrinsics/avx/ |
| D | DeconvMatMulAvx.c | 55 __m256 res11 = _mm256_setzero_ps(); in Deconv4X16AvxKernel() local
73 res11 = _mm256_fmadd_ps(tmp3, w1, res11); in Deconv4X16AvxKernel()
84 _mm256_storeu_ps(dst + stride + C24NUM, res11); in Deconv4X16AvxKernel()
98 __m256 res11 = _mm256_setzero_ps(); in Deconv4X24AvxKernel() local
119 res11 = _mm256_fmadd_ps(tmp, w1, res11); in Deconv4X24AvxKernel()
133 _mm256_storeu_ps(dst + stride + C24NUM, res11); in Deconv4X24AvxKernel()
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| /third_party/skia/third_party/externals/spirv-cross/shaders-hlsl-no-opt/asm/frag/ |
| D | subgroup-arithmetic-cast.invalid.nofxc.sm60.asm.frag | 51 ;%res11 = OpGroupNonUniformUMax %uint %uint_3 ClusteredReduce %u %uint_4
63 ;OpStore %FragColor %res11
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| /third_party/skia/third_party/externals/spirv-cross/shaders-msl-no-opt/asm/frag/ |
| D | subgroup-arithmetic-cast.msl21.asm.frag | 51 %res11 = OpGroupNonUniformUMax %uint %uint_3 ClusteredReduce %u %uint_4
63 OpStore %FragColor %res11
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| /third_party/skia/third_party/externals/spirv-cross/shaders-no-opt/asm/frag/ |
| D | subgroup-arithmetic-cast.nocompat.vk.asm.frag | 51 %res11 = OpGroupNonUniformUMax %uint %uint_3 ClusteredReduce %u %uint_4
63 OpStore %FragColor %res11
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/crosstest/ |
| D | test_vector_ops_ll.ll | 169 %res11 = zext <16 x i1> %res11_i1 to <16 x i8>
170 ret <16 x i8> %res11
324 %res11 = insertelement <16 x i8> %vec, i8 %elt, i32 11
325 ret <16 x i8> %res11
513 %res11 = zext i1 %res11_i1 to i64
514 ret i64 %res11
689 %res11 = zext i8 %res11_i8 to i64
690 ret i64 %res11
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| /third_party/mesa3d/src/amd/compiler/tests/ |
| D | test_optimizer_postRA.cpp | 391 Temp res11 = bld.vop2(aco_opcode::v_add_f32, bld.def(v1, reg_v2), Operand(tmp11_1, reg_v2), b); variable
392 writeout(11, Operand(res11, reg_v2), Operand(tmp11_2, reg_v0));
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| /third_party/ffmpeg/libavcodec/mips/ |
| D | vp9_idct_msa.c | 1309 v8i16 res8, res9, res10, res11, res12, res13, res14, res15; in vp9_iadst16_1d_columns_addblk_msa() local
1433 ILVR_B2_SH(zero, dst10, zero, dst11, res10, res11); in vp9_iadst16_1d_columns_addblk_msa()
1434 ADD2(res10, out10, res11, out11, res10, res11); in vp9_iadst16_1d_columns_addblk_msa()
1435 CLIP_SH2_0_255(res10, res11); in vp9_iadst16_1d_columns_addblk_msa()
1436 PCKEV_B2_SH(res10, res10, res11, res11, res10, res11); in vp9_iadst16_1d_columns_addblk_msa()
1438 ST_D1(res11, 0, dst + 9 * dst_stride); in vp9_iadst16_1d_columns_addblk_msa()
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| /third_party/mindspore/mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/fp32/ |
| D | matmul_fp32.c | 733 __m128 res11 = _mm_shuffle_ps(hi4, hi5, _MM_SHUFFLE(3, 2, 3, 2)); in RowMajor2Col6Major() local
745 _mm_storeu_ps(dst_c + 44, res11); in RowMajor2Col6Major()
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