| /third_party/ffmpeg/libavcodec/arm/ |
| D | fmtconvert_vfp.S | 41 vpush {s16-s31}
54 vldmia a3!, {s24-s31}
75 vcvt.f32.s32 s31, s31
92 vstmia a2!, {s28-s31}
94 vldmia a3!, {s24-s31}
118 vcvt.f32.s32 s31, s31
123 vstmia a2!, {s28-s31}
126 vpop {s16-s31}
145 vldmia a3!, {s24-s31}
156 vcvt.f32.s32 s31, s31
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| D | fft_vfp.S | 112 vstr d0, [a1, #0 * 2*4] @ transfer s0-s7 to s24-s31 via memory
146 vsub.f s7, s31, s3
171 vpush {s16-s31}
174 vpop {s16-s31}
248 vsub.f s6, s22, s31
328 vpush {s16-s31}
331 vpop {s16-s31}
508 vpush {s16-s31}
511 vpop {s16-s31}
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| D | synth_filter_vfp.S | 125 vpush {s16-s31}
200 vpop {s16-s31}
|
| /third_party/ffmpeg/libavutil/arm/ |
| D | float_dsp_vfp.S | 46 vldmiage r2!, {s28-s31}
61 vstmiage r0!, {s28-s31}
88 vpush {s16-s31}
225 vstmia DST0!, {s30-s31}
254 vstmia DST0!, {s28-s31}
261 vpop {s16-s31}
303 vldmiage r1!, {s28-s31}
326 vmulge.f32 s31, s20, s31
336 vstmiage r0!, {s28-s31}
354 vpush {s16-s31}
[all …]
|
| /third_party/jerryscript/targets/nuttx-stm32f4/ |
| D | setjmp.S | 39 vstm r0, {s16 - s31}
58 vldm r0, {s16 - s31}
|
| /third_party/boost/libs/mpl/test/ |
| D | set.cpp | 234 typedef mpl::set3<int,char,long> s31; in MPL_TEST_CASE() typedef
242 numbered_vs_variadic_set_test<s31,s32>(); in MPL_TEST_CASE()
244 basic_set_test<s01,s11,s21,s31>(); in MPL_TEST_CASE()
246 basic_set_test<s01,s11,s23,s31>(); in MPL_TEST_CASE()
|
| /third_party/openh264/codec/encoder/core/arm64/ |
| D | intra_pred_sad_3_opt_aarch64_neon.S | 277 saddlv s31, v31.8h
278 fmov w0, s31
331 saddlv s31, v31.8h
332 fmov w2, s31
401 addv s31, v31.4s
402 fmov w2, s31
522 addv s31, v31.4s
523 fmov w0, s31
601 addv s31, v31.4s
602 fmov w2, s31
|
| D | pixel_aarch64_neon.S | 45 saddlv s31, v31.8h
|
| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| D | IceRegistersARM32.def | 68 X(Reg_s31, 31, "s31", 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, REGLIST3(RegARM32, s31, d15, q7))
87 X(Reg_d15, 15, "d15", 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, REGLIST4(RegARM32, d15, q7, s30, s31)) \
114 …, 7, "q7", 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, REGLIST7(RegARM32, q7, d14, d15, s28, s29, s30, s31)) \
|
| /third_party/mindspore/mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ |
| D | MatmulFp32.S | 373 dup s31, v30.s[1]
374 stp s30, s31, [x19]
445 dup s31, v30.s[1]
446 stp s30, s31, [x19]
544 str s31, [x13]
616 stp s31, s30, [x13]
700 stp s31, s30, [x13]
|
| D | MatmulFp32OptRow12.S | 611 str s31, [x19]
1036 str s31, [x19], #4
|
| D | AdderFp32.S | 467 str s31, [x11]
|
| D | MatmulFp32Opt.S | 979 str s31, [x19]
1409 str s31, [x19], #4
|
| /third_party/mindspore/mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/int8/ |
| D | conv3x3_int8.c | 483 int32x4_t s31 = vld1q_s32(gemm_out + 52); in Conv3x3Int8OutputUnit() local
493 int32x4_t t11 = vshrq_n_s32(vsubq_s32(vsubq_s32(s11, s21), s31), 1); in Conv3x3Int8OutputUnit()
604 int32_t s31 = (local_ptr + 52)[0]; in Conv3x3Int8OutputUnit() local
614 int32_t t11 = (s11 - s21 - s31) / 2; in Conv3x3Int8OutputUnit()
685 int32_t s31 = (local_ptr + 52)[0]; in Conv3x3Int8OutputUnit() local
695 int32_t t11 = (s11 - s21 - s31) / 2; in Conv3x3Int8OutputUnit()
|
| /third_party/protobuf/src/google/protobuf/stubs/ |
| D | stringpiece_unittest.cc | 82 StringPiece s31(hola); in TEST() local
83 EXPECT_TRUE(s31.data() == hola.data()); in TEST()
84 EXPECT_EQ(8, s31.length()); in TEST()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMRegisterInfo.td | 115 def S30 : ARMFReg<30, "s30">; def S31 : ARMFReg<31, "s31">;
379 let DiagnosticString = "operand must be a register in range [s0, s31]";
391 let DiagnosticString = "operand must be a register in range [s0, s31]";
|
| D | ARMInstrInfo.td | 494 let DiagnosticString = "operand must be a list of registers in range [s0, s31]";
|
| /third_party/boost/boost/geometry/strategies/geographic/ |
| D | distance_cross_track.hpp | 433 …CT s31 = inverse_distance_azimuth_quantities_type::apply(lon3, lat3, lon1, lat1, spheroid).distanc… in newton() local
443 std::cout << "s31=" << s31 << "\ns32=" << s32 in newton()
|
| /third_party/abseil-cpp/absl/strings/ |
| D | string_view_test.cc | 117 absl::string_view s31(hola); in TEST() local
118 EXPECT_TRUE(s31.data() == hola.data()); in TEST()
119 EXPECT_EQ(8, s31.length()); in TEST()
|
| /third_party/skia/third_party/externals/abseil-cpp/absl/strings/ |
| D | string_view_test.cc | 117 absl::string_view s31(hola); in TEST() local
118 EXPECT_TRUE(s31.data() == hola.data()); in TEST()
119 EXPECT_EQ(8, s31.length()); in TEST()
|
| /third_party/openh264/codec/processing/src/arm64/ |
| D | vaa_calc_aarch64_neon.S | 95 str s31, [x5]
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64RegisterInfo.td | 349 def S31 : AArch64Reg<31, "s31", [H31]>, DwarfRegAlias<B31>;
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenAsmMatcher.inc | 472 return 116; // "s31"
5955 return "operand must be a register in range [s0, s31]";
6033 return "operand must be a list of registers in range [s0, s31]";
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenAsmMatcher.inc | 837 return 184; // "s31"
|