Searched refs:tile_swizzle (Results 1 – 12 of 12) sorted by relevance
183 radeon_emit((uint32_t)tiled_address | (tiled->surface.tile_swizzle << 8)); in si_sdma_v4_v5_copy_texture()239 unsigned dst_tile_swizzle = dst_mode == RADEON_SURF_MODE_2D ? sdst->surface.tile_swizzle : 0; in cik_sdma_copy_texture()240 unsigned src_tile_swizzle = src_mode == RADEON_SURF_MODE_2D ? ssrc->surface.tile_swizzle : 0; in cik_sdma_copy_texture()
681 if (sscreen->ws->buffer_is_suballocated(res->buf) || tex->surface.tile_swizzle || in si_texture_get_handle()690 assert(tex->surface.tile_swizzle == 0); in si_texture_get_handle()1565 assert(tex->surface.tile_swizzle == 0); in si_texture_from_winsys_buffer()
664 ((uint32_t)tex->surface.tile_swizzle << 16); in gfx9_clear_dcc_msaa()
3116 unsigned dcc_tile_swizzle = tex->surface.tile_swizzle; in si_emit_framebuffer_state()3126 cb_color_base |= tex->surface.tile_swizzle; in si_emit_framebuffer_state()3173 cb_color_base |= tex->surface.tile_swizzle; in si_emit_framebuffer_state()3212 cb_color_base |= tex->surface.tile_swizzle; in si_emit_framebuffer_state()
319 state[0] |= tex->surface.tile_swizzle; in si_set_mutable_tex_desc_fields()330 unsigned dcc_tile_swizzle = tex->surface.tile_swizzle << 8; in si_set_mutable_tex_desc_fields()
347 uint8_t tile_swizzle; member
885 u_bit_consecutive(0, sizeof(surf->tile_swizzle) * 8)); in gfx6_surface_settings()886 surf->tile_swizzle = AddrBaseSwizzleOut.tileSwizzle; in gfx6_surface_settings()1296 assert(xout.tileSwizzle <= u_bit_consecutive(0, sizeof(surf->tile_swizzle) * 8)); in gfx6_compute_surface()1799 assert(xout.pipeBankXor <= u_bit_consecutive(0, sizeof(surf->tile_swizzle) * 8)); in gfx9_compute_miptree()1800 surf->tile_swizzle = xout.pipeBankXor; in gfx9_compute_miptree()1910 assert(surf->tile_swizzle == 0); in gfx9_compute_miptree()
496 rtex->surface.tile_swizzle) { in r600_texture_get_handle()503 assert(rtex->surface.tile_swizzle == 0); in r600_texture_get_handle()652 out->tile_swizzle = fmask.tile_swizzle; in r600_texture_get_fmask_info()1149 assert(rtex->surface.tile_swizzle == 0); in r600_texture_from_handle()
192 unsigned tile_swizzle; member
408 surf_ws->fmask_tile_swizzle = fmask.tile_swizzle; in radeon_winsys_surface_init()
741 state[0] |= plane->surface.tile_swizzle; in si_set_mutable_tex_desc_fields()753 unsigned dcc_tile_swizzle = plane->surface.tile_swizzle << 8; in si_set_mutable_tex_desc_fields()
6632 cb->cb_color_base |= surf->tile_swizzle; in radv_initialise_color_surface()6639 cb->cb_color_base |= surf->tile_swizzle; in radv_initialise_color_surface()6678 unsigned dcc_tile_swizzle = surf->tile_swizzle; in radv_initialise_color_surface()