| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/ |
| D | MachineValueType.h | 94 v3i32 = 45, // 3 x i32 enumerator
477 case v3i32: in getVectorElementType()
633 case v3i32: in getVectorNumElements()
753 case v3i32: in getSizeInBits()
960 if (NumElements == 3) return MVT::v3i32; in getVectorVT()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | BUFInstructions.td | 812 "buffer_load_format_d16_xyz", v3i32
824 "buffer_store_format_d16_xyz", v3i32
877 "buffer_load_dwordx3", v3i32
891 defm : MUBUF_Pseudo_Load_Pats<"BUFFER_LOAD_DWORDX3", v3i32, load_global>;
902 "buffer_load_dwordx3", v3i32, null_frag, 0, 1
922 "buffer_store_dwordx3", v3i32, store_global
1217 defm : MUBUF_LoadIntrinsicPat<SIbuffer_load_format, v3i32, "BUFFER_LOAD_FORMAT_XYZ">;
1246 defm : MUBUF_LoadIntrinsicPat<SIbuffer_load, v3i32, "BUFFER_LOAD_DWORDX3">;
1299 defm : MUBUF_StoreIntrinsicPat<SIbuffer_store_format, v3i32, "BUFFER_STORE_FORMAT_XYZ">;
1328 defm : MUBUF_StoreIntrinsicPat<SIbuffer_store, v3i32, "BUFFER_STORE_DWORDX3">;
[all …]
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| D | AMDGPUCallingConv.td | 122 CCIfType<[v3i32, v3f32], CCAssignToStack<12, 4>>,
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| D | SIRegisterInfo.td | 509 def SGPR_96 : RegisterClass<"AMDGPU", [v3i32, v3f32], 32,
514 def SReg_96 : RegisterClass<"AMDGPU", [v3i32, v3f32], 32,
607 def VReg_96 : RegisterClass<"AMDGPU", [v3i32, v3f32], 32, (add VGPR_96)> {
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| D | FLATInstructions.td | 761 def : FlatLoadPat <FLAT_LOAD_DWORDX3, load_flat, v3i32>;
779 def : FlatStorePat <FLAT_STORE_DWORDX3, store_flat, v3i32, VReg_96>;
864 def : FlatLoadSignedPat <GLOBAL_LOAD_DWORDX3, load_global, v3i32>;
878 def : FlatStoreSignedPat <GLOBAL_STORE_DWORDX3, store_global, v3i32, VReg_96>;
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| D | SIInstructions.td | 850 i32, v3i32, Index, !cast<SubRegIndex>(sub#Index)
853 i32, v3i32, Index, !cast<SubRegIndex>(sub#Index)
1030 def : BitConvert <v3i32, v3f32, SGPR_96>;
1031 def : BitConvert <v3f32, v3i32, SGPR_96>;
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| D | AMDGPUISelLowering.cpp | 77 AddPromotedToType(ISD::LOAD, MVT::v3f32, MVT::v3i32); in AMDGPUTargetLowering()
177 AddPromotedToType(ISD::STORE, MVT::v3f32, MVT::v3i32); in AMDGPUTargetLowering()
278 setOperationAction(ISD::CONCAT_VECTORS, MVT::v3i32, Custom); in AMDGPUTargetLowering()
289 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v3i32, Custom); in AMDGPUTargetLowering()
357 MVT::v2i32, MVT::v3i32, MVT::v4i32, MVT::v5i32 in AMDGPUTargetLowering()
442 AddPromotedToType(ISD::SELECT, MVT::v3f32, MVT::v3i32); in AMDGPUTargetLowering()
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| D | SIISelLowering.cpp | 132 addRegisterClass(MVT::v3i32, &AMDGPU::SGPR_96RegClass); in SITargetLowering()
177 setOperationAction(ISD::LOAD, MVT::v3i32, Custom); in SITargetLowering()
186 setOperationAction(ISD::STORE, MVT::v3i32, Custom); in SITargetLowering()
195 setTruncStoreAction(MVT::v3i32, MVT::v3i16, Expand); in SITargetLowering()
338 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v3i32, Custom); in SITargetLowering()
6739 (WidenedVT == MVT::v3i32 || WidenedVT == MVT::v3f32)) { in getMemIntrinsicNode()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | ValueTypes.cpp | 190 case MVT::v3i32: return VectorType::get(Type::getInt32Ty(Context), 3); in getTypeForEVT()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ValueTypes.td | 69 def v3i32 : ValueType<96 , 45>; // 3 x i32 vector value
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| /third_party/mesa3d/src/amd/llvm/ |
| D | ac_llvm_build.h | 88 LLVMTypeRef v3i32; member
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| D | ac_llvm_build.c | 91 ctx->v3i32 = LLVMVectorType(ctx->i32, 3); in ac_llvm_context_init()
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| D | ac_nir_to_llvm.c | 3334 ctx->ac.v3i32, ""); in barycentric_model()
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| /third_party/vk-gl-cts/external/vulkancts/modules/vulkan/ray_tracing/ |
| D | vktRayTracingDataSpillTests.cpp | 1376 using v3i32 = tcu::Vector<deInt32, 3>; typedef
1523 if (dataType == DataType::INT32) GEN_V3_FILL(v3i32); in fillInputBuffer()
|