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Searched refs:vaddr0 (Results 1 – 8 of 8) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/MCTargetDesc/
DSIMCCodeEmitter.cpp295 int vaddr0 = AMDGPU::getNamedOperandIdx(MI.getOpcode(), in encodeInstruction() local
296 AMDGPU::OpName::vaddr0); in encodeInstruction()
299 assert(vaddr0 >= 0 && srsrc > vaddr0); in encodeInstruction()
300 unsigned NumExtraAddrs = srsrc - vaddr0 - 1; in encodeInstruction()
304 OS.write((uint8_t)getMachineOpValue(MI, MI.getOperand(vaddr0 + 1 + i), in encodeInstruction()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DMIMGInstructions.td239 let InOperandList = !con((ins AddrRC:$vaddr0, SReg_256:$srsrc, DMask:$dmask,
243 let AsmString = opcode#" $vdata, $vaddr0, $srsrc$dmask$dim$unorm$dlc$glc$slc$r128$tfe$lwe"
332 let InOperandList = !con((ins DataRC:$vdata, AddrRC:$vaddr0, SReg_256:$srsrc,
336 let AsmString = opcode#" $vdata, $vaddr0, $srsrc$dmask$dim$unorm$dlc$glc$slc$r128$tfe$lwe"
437 let InOperandList = (ins DataRC:$vdata, AddrRC:$vaddr0, SReg_256:$srsrc,
440 let AsmString = opcode#" $vdst, $vaddr0, $srsrc$dmask$dim$unorm$dlc$glc$slc$r128$tfe$lwe";
523 let InOperandList = !con((ins AddrRC:$vaddr0, SReg_256:$srsrc, SReg_128:$ssamp,
527 let AsmString = opcode#" $vdata, $vaddr0, $srsrc, $ssamp$dmask$dim$unorm"
DGCNNSAReassign.cpp171 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::vaddr0); in CheckNSA()
273 AMDGPU::getNamedOperandIdx(MI->getOpcode(), AMDGPU::OpName::vaddr0); in runOnMachineFunction()
DSIInstrFormats.td302 bits<8> vaddr0;
313 let Inst{39-32} = vaddr0;
DSIShrinkInstructions.cpp231 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::vaddr0); in shrinkMIMG()
DSIInstrInfo.cpp3655 AMDGPU::OpName::vaddr0); in verifyInstruction()
6028 int VAddr0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vaddr0); in getInstSizeInBytes()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/Disassembler/
DAMDGPUDisassembler.cpp375 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::vaddr0); in getInstruction()
471 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::vaddr0); in convertMIMGInst()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/AsmParser/
DAMDGPUAsmParser.cpp2984 int VAddr0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vaddr0); in validateMIMGAddrSize()