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Searched refs:vop3 (Results 1 – 16 of 16) sorted by relevance

/third_party/mesa3d/src/amd/compiler/
Daco_ir.cpp197 VOP3_instruction& vop3 = instr->vop3(); in can_use_SDWA() local
200 if (vop3.clamp && instr->isVOPC() && chip != GFX8) in can_use_SDWA()
202 if (vop3.omod && chip < GFX9) in can_use_SDWA()
267 VOP3_instruction& vop3 = tmp->vop3(); in convert_to_SDWA() local
268 memcpy(sdwa.neg, vop3.neg, sizeof(sdwa.neg)); in convert_to_SDWA()
269 memcpy(sdwa.abs, vop3.abs, sizeof(sdwa.abs)); in convert_to_SDWA()
270 sdwa.omod = vop3.omod; in convert_to_SDWA()
271 sdwa.clamp = vop3.clamp; in convert_to_SDWA()
316 const VOP3_instruction* vop3 = &instr->vop3(); in can_use_DPP() local
317 if (vop3->clamp || vop3->omod || vop3->opsel) in can_use_DPP()
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Daco_print_ir.cpp559 const VOP3_instruction& vop3 = instr->vop3(); in print_instr_format_specific() local
560 switch (vop3.omod) { in print_instr_format_specific()
565 if (vop3.clamp) in print_instr_format_specific()
567 if (vop3.opsel & (1 << 3)) in print_instr_format_specific()
665 const VOP3_instruction& vop3 = instr->vop3(); in aco_print_instr() local
667 abs[i] = vop3.abs[i]; in aco_print_instr()
668 neg[i] = vop3.neg[i]; in aco_print_instr()
669 opsel[i] = vop3.opsel & (1 << i); in aco_print_instr()
705 const VOP3P_instruction& vop3 = instr->vop3p(); in aco_print_instr() local
706 if ((vop3.opsel_lo & (1 << i)) || !(vop3.opsel_hi & (1 << i))) { in aco_print_instr()
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Daco_optimizer.cpp840 !(instr->vop3().opsel & (1 << idx))) { in can_apply_extract()
883 instr->vop3().opsel |= 1 << idx; in apply_extract()
1052 else if (instr->isVOP3() && !instr->vop3().abs[i]) in label_instruction()
1053 instr->vop3().neg[i] = true; in label_instruction()
1064 instr->vop3().abs[i] = true; in label_instruction()
1454 VOP3_instruction* vop3 = instr->isVOP3() ? &instr->vop3() : NULL; in label_instruction() local
1455 if (vop3 && (vop3->abs[!i] || vop3->neg[!i] || vop3->clamp || vop3->omod)) in label_instruction()
1458 bool abs = vop3 && vop3->abs[i]; in label_instruction()
1459 bool neg = neg1 ^ (vop3 && vop3->neg[i]); in label_instruction()
1500 VOP3_instruction& vop3 = instr->vop3(); in label_instruction() local
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Daco_assembler.cpp587 VOP3_instruction& vop3 = instr->vop3(); in emit_instruction() local
613 encoding |= (vop3.clamp ? 1 : 0) << 11; in emit_instruction()
616 encoding |= (vop3.clamp ? 1 : 0) << 15; in emit_instruction()
618 encoding |= vop3.opsel << 11; in emit_instruction()
620 encoding |= vop3.abs[i] << (8 + i); in emit_instruction()
632 encoding |= vop3.omod << 27; in emit_instruction()
634 encoding |= vop3.neg[i] << (29 + i); in emit_instruction()
638 VOP3P_instruction& vop3 = instr->vop3p(); in emit_instruction() local
650 encoding |= (vop3.clamp ? 1 : 0) << 15; in emit_instruction()
651 encoding |= vop3.opsel_lo << 11; in emit_instruction()
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Daco_lower_to_hw_instr.cpp217 bld.vop3(aco_opcode::v_add_co_u32_e64, dst[0], bld.def(bld.lm, vcc), vtmp_op[0], src1[0]); in emit_int64_dpp_op()
277 bld.vop3(aco_opcode::v_mul_lo_u32, vtmp_def[1], vtmp_op[0], src1[0]); in emit_int64_dpp_op()
282 bld.vop3(aco_opcode::v_mul_lo_u32, vtmp_def[0], vtmp_op[0], src1[1]); in emit_int64_dpp_op()
288 bld.vop3(aco_opcode::v_mul_hi_u32, vtmp_def[0], vtmp_op[0], src1[0]); in emit_int64_dpp_op()
294 bld.vop3(aco_opcode::v_mul_lo_u32, dst[0], vtmp_op[0], src1[0]); in emit_int64_dpp_op()
327 bld.vop3(aco_opcode::v_add_co_u32_e64, dst[0], bld.def(bld.lm, vcc), src0[0], src1[0]); in emit_int64_op()
376 bld.vop3(aco_opcode::v_mul_lo_u32, tmp0_def, src0[1], src1[0]); in emit_int64_op()
377 bld.vop3(aco_opcode::v_mul_lo_u32, tmp1_def, src0[0], src1[1]); in emit_int64_op()
379 bld.vop3(aco_opcode::v_mul_hi_u32, tmp1_def, src0[0], src1[0]); in emit_int64_op()
381 bld.vop3(aco_opcode::v_mul_lo_u32, dst[0], src0[0], src1[0]); in emit_int64_op()
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Daco_instruction_selection.cpp144 return bld.vop3(aco_opcode::v_mbcnt_lo_u32_b32, Definition(dst), mask_lo, base); in emit_mbcnt()
161 Temp mbcnt_lo = bld.vop3(aco_opcode::v_mbcnt_lo_u32_b32, bld.def(v1), mask_lo, base); in emit_mbcnt()
166 return bld.vop3(aco_opcode::v_mbcnt_hi_u32_b32_e64, Definition(dst), mask_hi, mbcnt_lo); in emit_mbcnt()
320 bld.vop3(aco_opcode::v_mul_hi_u32, Definition(multiply_dst), increment_dst, in emit_v_div_u32()
517 tmp[i] = bld.vop3(aco_opcode::v_alignbyte_b32, bld.def(v1), tmp[i + 1], tmp[i], offset); in byte_align_vector()
911 tmp = bld.vop3(op, bld.def(dst.regClass()), src[0], src[1], src[2]); in emit_vop3a_instruction()
913 tmp = bld.vop3(op, bld.def(dst.regClass()), src[0], src[1]); in emit_vop3a_instruction()
917 bld.vop3(aco_opcode::v_mul_f64, Definition(dst), Operand::c64(0x3FF0000000000000), tmp); in emit_vop3a_instruction()
919 bld.vop3(op, Definition(dst), src[0], src[1], src[2]); in emit_vop3a_instruction()
921 bld.vop3(op, Definition(dst), src[0], src[1]); in emit_vop3a_instruction()
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Daco_ir.h1263 VOP3_instruction& vop3() noexcept in vop3() function
1268 const VOP3_instruction& vop3() const noexcept in vop3() function
1734 const VOP3_instruction& vop3 = this->vop3(); in usesModifiers() local
1736 if (vop3.abs[i] || vop3.neg[i]) in usesModifiers()
1739 return vop3.opsel || vop3.clamp || vop3.omod; in usesModifiers()
Daco_validate.cpp225 VOP3_instruction& vop3 = instr->vop3(); in validate_ir() local
226 check(vop3.opsel == 0 || program->chip_class >= GFX9, in validate_ir()
233 check((vop3.opsel & (1 << i)) == 0, "Unexpected opsel for operand", instr.get()); in validate_ir()
236 check((vop3.opsel & (1 << 3)) == 0, "Unexpected opsel for sub-dword definition", in validate_ir()
Daco_opt_value_numbering.cpp167 VOP3_instruction& a3 = a->vop3(); in operator ()()
168 VOP3_instruction& b3 = b->vop3(); in operator ()()
Daco_register_allocation.cpp521 instr->vop3().opsel |= 1 << idx; in add_subdword_operand()
647 instr->vop3().opsel |= (1 << 3); /* dst in high half */ in add_subdword_definition()
/third_party/mesa3d/src/amd/compiler/tests/
Dtest_optimizer.cpp115 writeout(3, bld.vop3(aco_opcode::v_med3_f32, bld.def(v1), Operand::zero(),
122 writeout(4, bld.vop3(aco_opcode::v_med3_f32, bld.def(v1), Operand::zero(),
145 writeout(8, bld.vop3(aco_opcode::v_med3_f16, bld.def(v2b), Operand::c16(0u),
152 writeout(9, bld.vop3(aco_opcode::v_med3_f16, bld.def(v2b), Operand::c16(0u),
161 tmp = bld.vop3(aco_opcode::v_med3_f32, bld.def(v1), Operand::zero(), Operand::c32(0x3f800000u),
206 writeout(15, bld.vop3(aco_opcode::v_med3_f32, bld.def(v1), Operand::zero(),
224 writeout(17, bld.vop3(aco_opcode::v_med3_f16, bld.def(v2b), Operand::c16(0u),
245 writeout(19, bld.vop3(aco_opcode::v_med3_f32, bld.def(v1), Operand::zero(),
261 writeout(21, bld.vop3(aco_opcode::v_med3_f16, bld.def(v2b), Operand::c16(0u),
408 bcnt = bld.vop3(aco_opcode::v_bcnt_u32_b32, bld.def(v1), Operand(inputs[0]), Operand::zero());
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Dtest_sdwa.cpp262 writeout(13, bld.vop3(aco_opcode::v_add_i16, bld.def(v1), inputs[0], bfe_word0_b));
269 writeout(14, bld.vop3(aco_opcode::v_add_i16, bld.def(v1), inputs[0], bfe_word1_b));
388 …ruction *mul = &bld.vop2_e64(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], byte0_b).instr->vop3();
399 mul = &bld.vop2_e64(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], byte0_b).instr->vop3();
501 val = bld.vop3(aco_opcode::v_sub_i16, bld.def(v1), inputs[0], inputs[1]);
508 val = bld.vop3(aco_opcode::v_sub_i16, bld.def(v1), inputs[0], inputs[1]);
514 val = bld.vop3(aco_opcode::v_sub_i16, bld.def(v1), inputs[0], inputs[1]);
540 val = bld.vop3(aco_opcode::v_med3_f32, bld.def(v1), val, Operand::zero(),
557 val = bld.vop3(aco_opcode::v_med3_f32, bld.def(v1), val, Operand::zero(),
567 val = bld.vop3(aco_opcode::v_med3_f32, bld.def(v1), val, Operand::zero(),
Dtest_optimizer_postRA.cpp330 res4.instr->vop3().neg[0] = true;
338 res5.instr->vop3().clamp = true;
346 res6.instr->vop3().abs[0] = true;
353 res7.instr->vop3().abs[0] = true;
Dhelpers.cpp274 res.instr->vop3().abs[1] = true; in fabs()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPU.td475 def FeatureVOP3Literal : SubtargetFeature<"vop3-literal",
/third_party/mesa3d/docs/relnotes/
D21.0.0.rst2750 - aco: remove rollback code when making an instruction vop3