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Searched refs:BITFIELD64_BIT (Results 1 – 25 of 75) sorted by relevance

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/third_party/mesa3d/src/compiler/
Dshader_enums.h425 #define VARYING_BIT_POS BITFIELD64_BIT(VARYING_SLOT_POS)
426 #define VARYING_BIT_COL0 BITFIELD64_BIT(VARYING_SLOT_COL0)
427 #define VARYING_BIT_COL1 BITFIELD64_BIT(VARYING_SLOT_COL1)
428 #define VARYING_BIT_FOGC BITFIELD64_BIT(VARYING_SLOT_FOGC)
429 #define VARYING_BIT_TEX0 BITFIELD64_BIT(VARYING_SLOT_TEX0)
430 #define VARYING_BIT_TEX1 BITFIELD64_BIT(VARYING_SLOT_TEX1)
431 #define VARYING_BIT_TEX2 BITFIELD64_BIT(VARYING_SLOT_TEX2)
432 #define VARYING_BIT_TEX3 BITFIELD64_BIT(VARYING_SLOT_TEX3)
433 #define VARYING_BIT_TEX4 BITFIELD64_BIT(VARYING_SLOT_TEX4)
434 #define VARYING_BIT_TEX5 BITFIELD64_BIT(VARYING_SLOT_TEX5)
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/third_party/mesa3d/src/intel/compiler/
Dbrw_vue_map.c82 slots_valid |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST0); in brw_compute_vue_map()
83 slots_valid |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST1); in brw_compute_vue_map()
148 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST0)) in brw_compute_vue_map()
150 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST1)) in brw_compute_vue_map()
162 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_COL0)) in brw_compute_vue_map()
164 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_BFC0)) in brw_compute_vue_map()
166 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_COL1)) in brw_compute_vue_map()
168 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_BFC1)) in brw_compute_vue_map()
193 builtins &= ~BITFIELD64_BIT(varying); in brw_compute_vue_map()
204 generics &= ~BITFIELD64_BIT(varying); in brw_compute_vue_map()
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Dbrw_nir_lower_alpha_to_coverage.c87 if (!(outputs_written & BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK)) || in brw_nir_lower_alpha_to_coverage()
88 !(outputs_written & (BITFIELD64_BIT(FRAG_RESULT_COLOR) | in brw_nir_lower_alpha_to_coverage()
89 BITFIELD64_BIT(FRAG_RESULT_DATA0)))) in brw_nir_lower_alpha_to_coverage()
/third_party/mesa3d/src/mesa/tnl/
Dt_context.c151 tnl->render_inputs_bitset = BITFIELD64_BIT(_TNL_ATTRIB_POS); in _tnl_InvalidateState()
154 tnl->render_inputs_bitset |= BITFIELD64_BIT(_TNL_ATTRIB_COLOR0); in _tnl_InvalidateState()
158 tnl->render_inputs_bitset |= BITFIELD64_BIT(_TNL_ATTRIB_COLOR1); in _tnl_InvalidateState()
164 tnl->render_inputs_bitset |= BITFIELD64_BIT(_TNL_ATTRIB_TEX(i)); in _tnl_InvalidateState()
172 tnl->render_inputs_bitset |= BITFIELD64_BIT(_TNL_ATTRIB_FOG); in _tnl_InvalidateState()
177 tnl->render_inputs_bitset |= BITFIELD64_BIT(_TNL_ATTRIB_EDGEFLAG); in _tnl_InvalidateState()
180 tnl->render_inputs_bitset |= BITFIELD64_BIT(_TNL_ATTRIB_TEX0); in _tnl_InvalidateState()
183 tnl->render_inputs_bitset |= BITFIELD64_BIT(_TNL_ATTRIB_POINTSIZE); in _tnl_InvalidateState()
190 BITFIELD64_BIT(VARYING_SLOT_VAR0 + i)) { in _tnl_InvalidateState()
191 tnl->render_inputs_bitset |= BITFIELD64_BIT(_TNL_ATTRIB_GENERIC(i)); in _tnl_InvalidateState()
Dt_vb_program.c311 if (program->info.outputs_written & BITFIELD64_BIT(i)) { in run_vp()
354 if (program->info.inputs_read & BITFIELD64_BIT(attr)) { in run_vp()
385 if (program->info.outputs_written & BITFIELD64_BIT(VARYING_SLOT_FOGC)) { in run_vp()
454 BITFIELD64_BIT(VARYING_SLOT_VAR0 + i)) { in run_vp()
/third_party/mesa3d/src/mesa/drivers/dri/i965/
Dbrw_vs.c88 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_TEX0 + i); in brw_vs_outputs_written()
92 if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_BFC0)) in brw_vs_outputs_written()
93 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_COL0); in brw_vs_outputs_written()
94 if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_BFC1)) in brw_vs_outputs_written()
95 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_COL1); in brw_vs_outputs_written()
103 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST0); in brw_vs_outputs_written()
104 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST1); in brw_vs_outputs_written()
Dbrw_sf.c110 if (key.attrs & BITFIELD64_BIT(VARYING_SLOT_EDGE)) in brw_upload_sf_prog()
132 BITFIELD64_BIT(VARYING_SLOT_PNTC)) { in brw_upload_sf_prog()
Dbrw_wm.c419 if (prog->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) { in brw_wm_populate_key()
585 if (outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) in brw_wm_populate_default_key()
599 ~(BITFIELD64_BIT(FRAG_RESULT_DEPTH) | in brw_wm_populate_default_key()
600 BITFIELD64_BIT(FRAG_RESULT_STENCIL) | in brw_wm_populate_default_key()
601 BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK))); in brw_wm_populate_default_key()
/third_party/mesa3d/src/mesa/swrast_setup/
Dss_context.c131 if (index_bitset & BITFIELD64_BIT(_TNL_ATTRIB_COLOR0)) { in setup_vertex_format()
138 if (index_bitset & BITFIELD64_BIT(_TNL_ATTRIB_COLOR1)) { in setup_vertex_format()
142 if (index_bitset & BITFIELD64_BIT(_TNL_ATTRIB_FOG)) { in setup_vertex_format()
150 if (index_bitset & BITFIELD64_BIT(_TNL_ATTRIB_TEX(i))) { in setup_vertex_format()
160 if (index_bitset & BITFIELD64_BIT(_TNL_ATTRIB_GENERIC(i))) { in setup_vertex_format()
167 if (index_bitset & BITFIELD64_BIT(_TNL_ATTRIB_POINTSIZE)) in setup_vertex_format()
/third_party/mesa3d/src/compiler/nir/
Dnir_lower_fragcolor.c82 b->shader->info.outputs_written &= ~BITFIELD64_BIT(FRAG_RESULT_COLOR); in lower_fragcolor_instr()
83 b->shader->info.outputs_written |= BITFIELD64_BIT(FRAG_RESULT_DATA0); in lower_fragcolor_instr()
94 b->shader->info.outputs_written |= BITFIELD64_BIT(FRAG_RESULT_DATA0 + i); in lower_fragcolor_instr()
/third_party/mesa3d/src/mesa/swrast/
Ds_fragprog.c218 if (outputsWritten & BITFIELD64_BIT(FRAG_RESULT_COLOR)) { in run_program()
229 if (outputsWritten & BITFIELD64_BIT(FRAG_RESULT_DATA0 + buf)) { in run_program()
237 if (outputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) { in run_program()
274 if (program->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_COLOR)) { in _swrast_exec_fragment_program()
279 if (program->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) { in _swrast_exec_fragment_program()
/third_party/mesa3d/src/mesa/state_tracker/
Dst_util.h111 BITFIELD64_BIT(VARYING_SLOT_PSIZ)) { in st_point_size_per_vertex()
132 BITFIELD64_BIT(VARYING_SLOT_PSIZ)); in st_point_size_per_vertex()
Dst_atifs_to_nir.c550 prog->info.outputs_written = BITFIELD64_BIT(FRAG_RESULT_COLOR); in st_init_atifs_prog()
562 … prog->info.inputs_read |= BITFIELD64_BIT(VARYING_SLOT_TEX0 + pass_tex - GL_TEXTURE0_ARB); in st_init_atifs_prog()
569 … prog->info.inputs_read |= BITFIELD64_BIT(VARYING_SLOT_TEX0 + pass_tex - GL_TEXTURE0_ARB); in st_init_atifs_prog()
583 prog->info.inputs_read |= BITFIELD64_BIT(VARYING_SLOT_COL0); in st_init_atifs_prog()
588 prog->info.inputs_read |= BITFIELD64_BIT(VARYING_SLOT_COL1); in st_init_atifs_prog()
596 prog->info.inputs_read |= BITFIELD64_BIT(VARYING_SLOT_FOGC); in st_init_atifs_prog()
Dst_atom_shader.c106 gl_clamp[0] |= BITFIELD64_BIT(unit); in update_gl_clamp()
108 gl_clamp[1] |= BITFIELD64_BIT(unit); in update_gl_clamp()
110 gl_clamp[2] |= BITFIELD64_BIT(unit); in update_gl_clamp()
Dst_program.c439 if ((stp->Base.info.inputs_read & BITFIELD64_BIT(attr)) != 0) { in st_prepare_vertex_program()
452 if (stp->Base.info.outputs_written & BITFIELD64_BIT(attr)) in st_prepare_vertex_program()
475 if (prog->info.outputs_written & BITFIELD64_BIT(attr)) in st_translate_stream_output_info()
631 if (stp->Base.info.outputs_written & BITFIELD64_BIT(attr)) { in st_translate_vertex_program()
1082 if ((inputsRead & BITFIELD64_BIT(attr)) != 0) { in st_translate_fragment_program()
1221 if (outputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) { in st_translate_fragment_program()
1229 if (outputsWritten & BITFIELD64_BIT(FRAG_RESULT_STENCIL)) { in st_translate_fragment_program()
1237 if (outputsWritten & BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK)) { in st_translate_fragment_program()
1251 if (written & BITFIELD64_BIT(loc)) { in st_translate_fragment_program()
1748 if ((prog->info.inputs_read & BITFIELD64_BIT(attr)) == 0) in st_translate_common_program()
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/third_party/mesa3d/src/mesa/drivers/dri/r200/
Dr200_tcl.c433 assert(vp_out & BITFIELD64_BIT(VARYING_SLOT_POS)); in r200_run_tcl_render()
435 if (vp_out & BITFIELD64_BIT(VARYING_SLOT_COL0)) { in r200_run_tcl_render()
438 if (vp_out & BITFIELD64_BIT(VARYING_SLOT_COL1)) { in r200_run_tcl_render()
441 if (vp_out & BITFIELD64_BIT(VARYING_SLOT_FOGC)) { in r200_run_tcl_render()
444 if (vp_out & BITFIELD64_BIT(VARYING_SLOT_PSIZ)) { in r200_run_tcl_render()
448 if (vp_out & BITFIELD64_BIT(i)) { in r200_run_tcl_render()
Dr200_swtcl.c113 if (index_bitset & BITFIELD64_BIT(_TNL_ATTRIB_POINTSIZE)) { in r200SetVertexFormat()
128 (BITFIELD64_BIT(_TNL_ATTRIB_COLOR1) | BITFIELD64_BIT(_TNL_ATTRIB_FOG))) { in r200SetVertexFormat()
131 if (index_bitset & BITFIELD64_BIT(_TNL_ATTRIB_COLOR1)) { in r200SetVertexFormat()
139 if (index_bitset & BITFIELD64_BIT(_TNL_ATTRIB_FOG)) { in r200SetVertexFormat()
146 if (index_bitset & BITFIELD64_BIT(_TNL_ATTRIB_FOG)) { in r200SetVertexFormat()
153 if (index_bitset & BITFIELD64_BIT(_TNL_ATTRIB_COLOR1)) { in r200SetVertexFormat()
167 if (index_bitset & BITFIELD64_BIT(_TNL_ATTRIB_TEX(i))) { in r200SetVertexFormat()
/third_party/mesa3d/src/mesa/drivers/dri/radeon/
Dradeon_swtcl.c137 (BITFIELD64_BIT(_TNL_ATTRIB_COLOR1) | BITFIELD64_BIT(_TNL_ATTRIB_FOG))) { in radeonSetVertexFormat()
140 if (index_bitset & BITFIELD64_BIT(_TNL_ATTRIB_COLOR1)) { in radeonSetVertexFormat()
149 if (index_bitset & BITFIELD64_BIT(_TNL_ATTRIB_FOG)) { in radeonSetVertexFormat()
157 if (index_bitset & BITFIELD64_BIT(_TNL_ATTRIB_FOG)) { in radeonSetVertexFormat()
165 if (index_bitset & BITFIELD64_BIT(_TNL_ATTRIB_COLOR1)) { in radeonSetVertexFormat()
180 if (index_bitset & BITFIELD64_BIT(_TNL_ATTRIB_TEX(i))) { in radeonSetVertexFormat()
297 | BITFIELD64_BIT(_TNL_ATTRIB_COLOR1)))) in radeonChooseVertexState()
/third_party/mesa3d/src/mesa/drivers/dri/i915/
Di830_vtbl.c105 if (index_bitset & BITFIELD64_BIT(_TNL_ATTRIB_POINTSIZE)) { in i830_render_start()
112 if (index_bitset & (BITFIELD64_BIT(_TNL_ATTRIB_COLOR1) | in i830_render_start()
113 BITFIELD64_BIT(_TNL_ATTRIB_FOG))) { in i830_render_start()
114 if (index_bitset & BITFIELD64_BIT(_TNL_ATTRIB_COLOR1)) { in i830_render_start()
121 if (index_bitset & BITFIELD64_BIT(_TNL_ATTRIB_FOG)) in i830_render_start()
131 if (index_bitset & BITFIELD64_BIT(_TNL_ATTRIB_TEX(i))) { in i830_render_start()
/third_party/mesa3d/src/panfrost/lib/
Dpan_shader.c229 if (s->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) in GENX()
231 if (s->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_STENCIL)) in GENX()
233 if (s->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK)) in GENX()
/third_party/mesa3d/src/mesa/vbo/
Dvbo_attrib.h108 BITFIELD64_BIT(VBO_ATTRIB_EDGEFLAG))
/third_party/mesa3d/src/mesa/program/
Dprogramopt.c111 vprog->info.outputs_written |= BITFIELD64_BIT(VARYING_SLOT_POS); in insert_mvp_dp4_code()
212 vprog->info.outputs_written |= BITFIELD64_BIT(VARYING_SLOT_POS); in insert_mvp_mad_code()
596 !(prog->info.inputs_read & BITFIELD64_BIT(VARYING_SLOT_POS))) in _mesa_program_fragment_position_to_sysval()
599 prog->info.inputs_read &= ~BITFIELD64_BIT(VARYING_SLOT_POS); in _mesa_program_fragment_position_to_sysval()
/third_party/mesa3d/src/util/
Dmacros.h396 #define BITFIELD64_BIT(b) (1ull << (b)) macro
399 ((b) == 64 ? (~0ull) : BITFIELD64_BIT(b) - 1)
/third_party/mesa3d/src/gallium/drivers/radeonsi/
Dsi_shader_nir.c462 info->writes_z = nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH); in si_nir_scan_shader()
463 info->writes_stencil = nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_STENCIL); in si_nir_scan_shader()
464 info->writes_samplemask = nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK); in si_nir_scan_shader()
467 if (nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_COLOR)) { in si_nir_scan_shader()
895 BITFIELD64_BIT(VARYING_SLOT_PNTC) | BITFIELD64_RANGE(VARYING_SLOT_VAR0, 32), in si_lower_nir()
/third_party/mesa3d/src/compiler/glsl/
Dir_set_program_inouts.cpp105 bitfield = BITFIELD64_BIT(idx - VARYING_SLOT_PATCH0); in mark()
109 bitfield = BITFIELD64_BIT(idx); in mark()

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