| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | ScalarizeMaskedMemIntrin.cpp | 165 for (unsigned Idx = 0; Idx < VectorWidth; ++Idx) { in scalarizeMaskedLoad() local
166 if (cast<Constant>(Mask)->getAggregateElement(Idx)->isNullValue()) in scalarizeMaskedLoad()
168 Value *Gep = Builder.CreateConstInBoundsGEP1_32(EltTy, FirstEltPtr, Idx); in scalarizeMaskedLoad()
170 VResult = Builder.CreateInsertElement(VResult, Load, Idx); in scalarizeMaskedLoad()
185 for (unsigned Idx = 0; Idx < VectorWidth; ++Idx) { in scalarizeMaskedLoad() local
195 Value *Mask = Builder.getInt(APInt::getOneBitSet(VectorWidth, Idx)); in scalarizeMaskedLoad()
199 Predicate = Builder.CreateExtractElement(Mask, Idx); in scalarizeMaskedLoad()
212 Value *Gep = Builder.CreateConstInBoundsGEP1_32(EltTy, FirstEltPtr, Idx); in scalarizeMaskedLoad()
214 Value *NewVResult = Builder.CreateInsertElement(VResult, Load, Idx); in scalarizeMaskedLoad()
298 for (unsigned Idx = 0; Idx < VectorWidth; ++Idx) { in scalarizeMaskedStore() local
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| D | SplitKit.cpp | 340 bool SplitAnalysis::isOriginalEndpoint(SlotIndex Idx) const { in isOriginalEndpoint()
344 LiveInterval::const_iterator I = Orig.find(Idx); in isOriginalEndpoint()
347 if (I != Orig.end() && I->start <= Idx) in isOriginalEndpoint()
348 return I->start == Idx; in isOriginalEndpoint()
351 return I != Orig.begin() && (--I)->end == Idx; in isOriginalEndpoint()
458 SlotIndex Idx, in defValue() argument
461 assert(Idx.isValid() && "Invalid SlotIndex"); in defValue()
462 assert(Edit->getParent().getVNInfoAt(Idx) == ParentVNI && "Bad Parent VNI"); in defValue()
466 VNInfo *VNI = LI->getNextValue(Idx, LIS.getVNInfoAllocator()); in defValue()
562 for (unsigned Idx = 1, E = TRI.getNumSubRegIndices(); Idx < E; ++Idx) { in buildCopy() local
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| D | LiveDebugVariables.cpp | 288 void addDef(SlotIndex Idx, const MachineOperand &LocMO, bool IsIndirect) { in addDef() argument
291 LocMap::iterator I = locInts.find(Idx); in addDef()
292 if (!I.valid() || I.start() != Idx) in addDef()
293 I.insert(Idx, Idx.getNextSlot(), Loc); in addDef()
313 void extendDef(SlotIndex Idx, DbgValueLocation Loc,
371 void insertDebugLabel(MachineBasicBlock *MBB, SlotIndex Idx,
376 UserLabel(const DILabel *label, DebugLoc L, SlotIndex Idx) in UserLabel() argument
377 : Label(label), dl(std::move(L)), loc(Idx) {} in UserLabel()
435 bool handleDebugValue(MachineInstr &MI, SlotIndex Idx);
443 bool handleDebugLabel(MachineInstr &MI, SlotIndex Idx);
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/ADT/ |
| D | SparseMultiSet.h | 166 unsigned Idx = FreelistIdx; in addValue() local
167 unsigned NextFree = Dense[Idx].Next; in addValue()
168 assert(Dense[Idx].isTombstone() && "Non-tombstone free?"); in addValue()
170 Dense[Idx] = SMSNode(V, Prev, Next); in addValue()
173 return Idx; in addValue()
177 void makeTombstone(unsigned Idx) { in makeTombstone() argument
178 Dense[Idx].Prev = SMSNode::INVALID; in makeTombstone()
179 Dense[Idx].Next = FreelistIdx; in makeTombstone()
180 FreelistIdx = Idx; in makeTombstone()
225 unsigned Idx; variable
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| D | PackedVector.h | 30 static T getValue(const BitVectorTy &Bits, unsigned Idx) { in getValue() argument
33 val = T(val | ((Bits[(Idx << (BitNum-1)) + i] ? 1UL : 0UL) << i)); in getValue()
37 static void setValue(BitVectorTy &Bits, unsigned Idx, T val) { in setValue() argument
40 Bits[(Idx << (BitNum-1)) + i] = val & (T(1) << i); in setValue()
47 static T getValue(const BitVectorTy &Bits, unsigned Idx) { in getValue() argument
50 val = T(val | ((Bits[(Idx << (BitNum-1)) + i] ? 1UL : 0UL) << i)); in getValue()
51 if (Bits[(Idx << (BitNum-1)) + BitNum-1]) in getValue()
56 static void setValue(BitVectorTy &Bits, unsigned Idx, T val) { in setValue() argument
59 Bits.set((Idx << (BitNum-1)) + BitNum-1); in setValue()
63 Bits[(Idx << (BitNum-1)) + i] = val & (T(1) << i); in setValue()
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| D | SparseBitVector.h | 62 explicit SparseBitVectorElement(unsigned Idx) { in SparseBitVectorElement()
63 ElementIndex = Idx; in SparseBitVectorElement()
82 BitWord word(unsigned Idx) const { in word()
83 assert(Idx < BITWORDS_PER_ELEMENT); in word()
84 return Bits[Idx]; in word()
98 void set(unsigned Idx) { in set()
99 Bits[Idx / BITWORD_SIZE] |= 1L << (Idx % BITWORD_SIZE); in set()
102 bool test_and_set(unsigned Idx) { in test_and_set()
103 bool old = test(Idx); in test_and_set()
105 set(Idx); in test_and_set()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonBlockRanges.h | 54 IndexType(unsigned Idx) : Index(Idx) {} in IndexType()
60 bool operator== (IndexType Idx) const;
62 bool operator!= (IndexType Idx) const;
64 bool operator< (unsigned Idx) const;
65 bool operator< (IndexType Idx) const;
66 bool operator<= (IndexType Idx) const;
69 bool operator> (IndexType Idx) const;
70 bool operator>= (IndexType Idx) const;
126 MachineInstr *getInstr(IndexType Idx) const;
129 IndexType getPrevIndex(IndexType Idx) const;
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| D | HexagonBlockRanges.cpp | 159 IndexType Idx = IndexType::First; in InstrIndexMap() local
160 First = Idx; in InstrIndexMap()
165 Map.insert(std::make_pair(Idx, &In)); in InstrIndexMap()
166 ++Idx; in InstrIndexMap()
168 Last = B.empty() ? IndexType::None : unsigned(Idx)-1; in InstrIndexMap()
171 MachineInstr *HexagonBlockRanges::InstrIndexMap::getInstr(IndexType Idx) const { in getInstr()
172 auto F = Map.find(Idx); in getInstr()
185 IndexType Idx) const { in getPrevIndex()
186 assert (Idx != IndexType::None); in getPrevIndex()
187 if (Idx == IndexType::Entry) in getPrevIndex()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Bitcode/Reader/ |
| D | ValueList.cpp | 68 void BitcodeReaderValueList::assignValue(Value *V, unsigned Idx, Type *FullTy) { in assignValue() argument
69 if (Idx == size()) { in assignValue()
74 if (Idx >= size()) in assignValue()
75 resize(Idx + 1); in assignValue()
77 assert(FullTypes[Idx] == nullptr || FullTypes[Idx] == FullTy); in assignValue()
78 FullTypes[Idx] = FullTy; in assignValue()
80 WeakTrackingVH &OldV = ValuePtrs[Idx]; in assignValue()
89 ResolveConstants.push_back(std::make_pair(PHC, Idx)); in assignValue()
99 Constant *BitcodeReaderValueList::getConstantFwdRef(unsigned Idx, Type *Ty) { in getConstantFwdRef() argument
101 if (Idx >= RefsUpperBound) in getConstantFwdRef()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ExpandImm.cpp | 51 for (unsigned Idx = 0; Idx < 4; ++Idx) in tryToreplicateChunks() local
52 ++Counts[getChunk(UImm, Idx)]; in tryToreplicateChunks()
126 static uint64_t updateImm(uint64_t Imm, unsigned Idx, bool Clear) { in updateImm() argument
131 Imm &= ~(Mask << (Idx * 16)); in updateImm()
134 Imm |= Mask << (Idx * 16); in updateImm()
160 for (int Idx = 0; Idx < 4; ++Idx) { in trySequenceOfOnes() local
161 int64_t Chunk = getChunk(UImm, Idx); in trySequenceOfOnes()
166 StartIdx = Idx; in trySequenceOfOnes()
168 EndIdx = Idx; in trySequenceOfOnes()
194 for (int Idx = 0; Idx < 4; ++Idx) { in trySequenceOfOnes() local
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| D | AArch64RegisterBankInfo.cpp | 95 #define CHECK_PARTIALMAP(Idx, ValStartIdx, ValLength, RB) \ in AArch64RegisterBankInfo() argument
98 checkPartialMap(PartialMappingIdx::Idx, ValStartIdx, ValLength, RB) && \ in AArch64RegisterBankInfo()
99 #Idx " is incorrectly initialized"); \ in AArch64RegisterBankInfo()
444 for (unsigned Idx = 1; Idx != NumOperands; ++Idx) { in getSameKindOfOperandsMapping() local
445 LLT OpTy = MRI.getType(MI.getOperand(Idx).getReg()); in getSameKindOfOperandsMapping()
618 for (unsigned Idx = 0; Idx < NumOperands; ++Idx) { in getInstrMapping() local
619 auto &MO = MI.getOperand(Idx); in getInstrMapping()
624 OpSize[Idx] = Ty.getSizeInBits(); in getInstrMapping()
630 OpRegBankIdx[Idx] = PMI_FirstFPR; in getInstrMapping()
632 OpRegBankIdx[Idx] = PMI_FirstGPR; in getInstrMapping()
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| D | AArch64A57FPLoadBalancing.cpp | 142 void scanInstruction(MachineInstr *MI, unsigned Idx,
145 void maybeKillChain(MachineOperand &MO, unsigned Idx,
203 Chain(MachineInstr *MI, unsigned Idx, Color C) in Chain() argument
205 StartInstIdx(Idx), LastInstIdx(Idx), KillInstIdx(0), in Chain()
212 void add(MachineInstr *MI, unsigned Idx, Color C) { in add() argument
214 LastInstIdx = Idx; in add()
233 void setKill(MachineInstr *MI, unsigned Idx, bool Immutable) { in setKill() argument
235 KillInstIdx = Idx; in setKill()
342 unsigned Idx = 0; in runOnBasicBlock() local
344 scanInstruction(&MI, Idx++, ActiveChains, AllChains); in runOnBasicBlock()
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| /third_party/json/test/thirdparty/Fuzzer/ |
| D | FuzzerCorpus.h | 63 const Unit &operator[] (size_t Idx) const { return Inputs[Idx]->U; }
93 size_t Idx = static_cast<size_t>(CorpusDistribution(Rand.Get_mt19937())); in ChooseUnitIdxToMutate() local
94 assert(Idx < Inputs.size()); in ChooseUnitIdxToMutate()
95 return Idx; in ChooseUnitIdxToMutate()
119 void DeleteInput(size_t Idx) { in DeleteInput() argument
120 InputInfo &II = *Inputs[Idx]; in DeleteInput()
125 Printf("EVICTED %zd\n", Idx); in DeleteInput()
128 bool AddFeature(size_t Idx, uint32_t NewSize, bool Shrink) { in AddFeature() argument
130 Idx = Idx % kFeatureSetSize; in AddFeature()
131 uint32_t OldSize = GetFeature(Idx); in AddFeature()
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| D | FuzzerTracePC.h | 34 void Insert(size_t Idx, T Arg1, T Arg2) { in Insert()
35 Idx = Idx % kSize; in Insert()
36 Table[Idx].A = Arg1; in Insert()
37 Table[Idx].B = Arg2; in Insert()
89 uintptr_t GetPC(size_t Idx) { in GetPC() argument
90 assert(Idx < GetNumPCs()); in GetPC()
91 return PCs[Idx]; in GetPC()
126 for (size_t Idx = 0; Idx < N; Idx += Step) { in CollectFeatures() local
127 uint64_t Bundle = *reinterpret_cast<uint64_t*>(&Counters[Idx]); in CollectFeatures()
129 for (size_t i = Idx; i < Idx + Step; i++) { in CollectFeatures()
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| D | FuzzerTracePC.cpp | 32 uint32_t Idx = *Guard; in HandleTrace() local
33 if (!Idx) return; in HandleTrace()
34 PCs[Idx % kNumPCs] = PC; in HandleTrace()
35 Counters[Idx % kNumCounters]++; in HandleTrace()
66 uintptr_t Idx = (Caller & kMask) | ((Callee & kMask) << kBits); in HandleCallerCallee() local
67 HandleValueProfile(Idx); in HandleCallerCallee()
218 size_t Idx = I; in AddValueForMemcmp() local
221 TPC.HandleValueProfile((PC & 4095) | (Idx << 12)); in AddValueForMemcmp()
236 size_t Idx = I; in AddValueForStrcmp() local
239 TPC.HandleValueProfile((PC & 4095) | (Idx << 12)); in AddValueForStrcmp()
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| D | FuzzerMutate.cpp | 80 size_t Idx = Rand(Corpus->size()); in Mutate_CustomCrossOver() local
81 const Unit &Other = (*Corpus)[Idx]; in Mutate_CustomCrossOver()
114 size_t Idx = Rand(Size - N + 1); in Mutate_EraseBytes() local
116 memmove(Data + Idx, Data + Idx + N, Size - Idx - N); in Mutate_EraseBytes()
124 size_t Idx = Rand(Size + 1); in Mutate_InsertByte() local
126 memmove(Data + Idx + 1, Data + Idx, Size - Idx); in Mutate_InsertByte()
127 Data[Idx] = RandCh(Rand); in Mutate_InsertByte()
139 size_t Idx = Rand(Size + 1); in Mutate_InsertRepeatedBytes() local
141 memmove(Data + Idx + N, Data + Idx, Size - Idx); in Mutate_InsertRepeatedBytes()
145 Data[Idx + i] = Byte; in Mutate_InsertRepeatedBytes()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Transforms/IPO/ |
| D | DeadArgumentElimination.h | 46 unsigned Idx; member
49 RetOrArg(const Function *F, unsigned Idx, bool IsArg) in RetOrArg()
50 : F(F), Idx(Idx), IsArg(IsArg) {} in RetOrArg()
54 return std::tie(F, Idx, IsArg) < std::tie(O.F, O.Idx, O.IsArg);
59 return F == O.F && Idx == O.Idx && IsArg == O.IsArg;
63 return (Twine(IsArg ? "Argument #" : "Return value #") + Twine(Idx) + in getDescription()
82 RetOrArg CreateRet(const Function *F, unsigned Idx) { in CreateRet() argument
83 return RetOrArg(F, Idx, false); in CreateRet()
87 RetOrArg CreateArg(const Function *F, unsigned Idx) { in CreateArg() argument
88 return RetOrArg(F, Idx, true); in CreateArg()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/ |
| D | ArrayRecycler.h | 43 T *pop(unsigned Idx) { in pop() argument
44 if (Idx >= Bucket.size()) in pop()
46 FreeList *Entry = Bucket[Idx]; in pop()
49 __asan_unpoison_memory_region(Entry, Capacity::get(Idx).getSize()); in pop()
50 Bucket[Idx] = Entry->Next; in pop()
51 __msan_allocated_memory(Entry, Capacity::get(Idx).getSize()); in pop()
56 void push(unsigned Idx, T *Ptr) { in push() argument
59 if (Idx >= Bucket.size()) in push()
60 Bucket.resize(size_t(Idx) + 1); in push()
61 Entry->Next = Bucket[Idx]; in push()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MC/ |
| D | MCRegisterInfo.cpp | 32 MCRegister MCRegisterInfo::getSubReg(MCRegister Reg, unsigned Idx) const { in getSubReg()
33 assert(Idx && Idx < getNumSubRegIndices() && in getSubReg()
39 if (*SRI == Idx) in getSubReg()
56 unsigned MCRegisterInfo::getSubRegIdxSize(unsigned Idx) const { in getSubRegIdxSize()
57 assert(Idx && Idx < getNumSubRegIndices() && in getSubRegIdxSize()
59 return SubRegIdxRanges[Idx].Size; in getSubRegIdxSize()
62 unsigned MCRegisterInfo::getSubRegIdxOffset(unsigned Idx) const { in getSubRegIdxOffset()
63 assert(Idx && Idx < getNumSubRegIndices() && in getSubRegIdxOffset()
65 return SubRegIdxRanges[Idx].Offset; in getSubRegIdxOffset()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | RegisterBankInfo.cpp | 62 for (unsigned Idx = 0, End = getNumRegBanks(); Idx != End; ++Idx) { in RegisterBankInfo() local
63 assert(RegBanks[Idx] != nullptr && "Invalid RegisterBank"); in RegisterBankInfo()
64 assert(RegBanks[Idx]->isValid() && "RegisterBank should be valid"); in RegisterBankInfo()
71 for (unsigned Idx = 0, End = getNumRegBanks(); Idx != End; ++Idx) { in verify() local
72 const RegisterBank &RegBank = getRegBank(Idx); in verify()
73 assert(Idx == RegBank.getID() && in verify()
308 for (unsigned Idx = 0; Idx != NumBreakDowns; ++Idx) in hashValueMapping() local
309 Hashes.push_back(hash_value(BreakDown[Idx])); in hashValueMapping()
351 unsigned Idx = 0; in getOperandsMapping() local
352 for (Iterator It = Begin; It != End; ++It, ++Idx) { in getOperandsMapping()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/DebugInfo/CodeView/ |
| D | TypeStreamMerger.cpp | 24 static inline size_t slotForIndex(TypeIndex Idx) { in slotForIndex() argument
25 assert(!Idx.isSimple() && "simple type indices have no slots"); in slotForIndex()
26 return Idx.getIndex() - TypeIndex::FirstNonSimpleIndex; in slotForIndex()
108 void addMapping(TypeIndex Idx);
110 inline bool remapTypeIndex(TypeIndex &Idx) { in remapTypeIndex() argument
117 return remapIndex(Idx, TypeLookup); in remapTypeIndex()
120 return remapIndex(Idx, IndexMap); in remapTypeIndex()
122 inline bool remapItemIndex(TypeIndex &Idx) { in remapItemIndex() argument
124 return remapIndex(Idx, IndexMap); in remapItemIndex()
138 inline bool remapIndex(TypeIndex &Idx, ArrayRef<TypeIndex> Map) { in remapIndex() argument
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/DebugInfo/PDB/Native/ |
| D | HashTable.cpp | 39 for (unsigned Idx = 0; Idx < 32; ++Idx) in readSparseBitVector() local
40 if (Word & (1U << Idx)) in readSparseBitVector()
41 V.set((I * 32) + Idx); in readSparseBitVector()
58 uint32_t Idx = 0; in writeSparseBitVector() local
61 for (uint32_t WordIdx = 0; WordIdx < 32; ++WordIdx, ++Idx) { in writeSparseBitVector()
62 if (Vec.test(Idx)) in writeSparseBitVector()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUGenRegisterBankInfo.def | 153 unsigned Idx;
159 Idx = BankID == AMDGPU::SGPRRegBankID ? PM_SGPR1 : PM_VGPR1;
164 Idx = PM_VGPR96;
167 Idx = PM_SGPR96;
170 Idx = PM_AGPR96;
178 Idx = VGPRStartIdx;
181 Idx = SGPRStartIdx;
184 Idx = AGPRStartIdx;
188 Idx += Log2_32_Ceil(Size);
192 assert(Log2_32_Ceil(Size) == Log2_32_Ceil(ValMappings[Idx].BreakDown->Length));
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/ |
| D | CFG.h | 147 int Idx; variable
150 inline bool index_is_valid(int Idx) { in index_is_valid() argument
153 return Idx >= 0 && (Idx == 0 || Idx <= (int)Inst->getNumSuccessors()); in index_is_valid()
171 It.Inst->setSuccessor(It.Idx, RHS);
180 explicit inline SuccIterator(InstructionT *Inst) : Inst(Inst), Idx(0) {} in SuccIterator()
184 Idx = Inst->getNumSuccessors(); in SuccIterator()
192 Idx = 0; in SuccIterator()
197 int getSuccessorIndex() const { return Idx; } in getSuccessorIndex()
199 inline bool operator==(const Self &x) const { return Idx == x.Idx; }
201 inline BlockT *operator*() const { return Inst->getSuccessor(Idx); }
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| /third_party/mesa3d/src/amd/compiler/ |
| D | aco_optimizer_postRA.cpp | 38 struct Idx { struct
39 bool operator==(const Idx& other) const { return block == other.block && instr == other.instr; } in operator ==() argument
40 bool operator!=(const Idx& other) const { return !operator==(other); } in operator !=() argument
48 Idx not_written_in_block{UINT32_MAX, 0};
49 Idx clobbered{UINT32_MAX, 1};
50 Idx const_or_undef{UINT32_MAX, 2};
51 Idx written_by_multiple_instrs{UINT32_MAX, 3};
58 std::vector<std::array<Idx, max_reg_cnt>> instr_idx_by_regs;
84 Instruction* get(Idx idx) { return program->blocks[idx.block].instructions[idx.instr].get(); } in get()
96 Idx idx{ctx.current_block->index, ctx.current_instr_idx}; in save_reg_writes()
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